/* Generated automatically by the program `gencodes'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CODES_H
#define GCC_INSN_CODES_H

enum insn_code {
  CODE_FOR_nothing = 0,

  CODE_FOR_x86_fnstsw_1 = 47,
  CODE_FOR_x86_sahf_1 = 48,
  CODE_FOR_kmovw = 91,
  CODE_FOR_movsi_insv_1 = 118,
  CODE_FOR_movdi_insv_1 = 119,
  CODE_FOR_swapxf = 130,
  CODE_FOR_zero_extendqidi2 = 134,
  CODE_FOR_zero_extendhidi2 = 135,
  CODE_FOR_zero_extendqisi2_and = 136,
  CODE_FOR_zero_extendhisi2_and = 137,
  CODE_FOR_zero_extendqihi2_and = 140,
  CODE_FOR_extendsidi2_1 = 143,
  CODE_FOR_extendqidi2 = 144,
  CODE_FOR_extendhidi2 = 145,
  CODE_FOR_extendhisi2 = 146,
  CODE_FOR_extendqisi2 = 148,
  CODE_FOR_extendqihi2 = 150,
  CODE_FOR_truncxfsf2_i387_noop = 164,
  CODE_FOR_truncxfdf2_i387_noop = 165,
  CODE_FOR_fix_truncsfsi_sse = 170,
  CODE_FOR_fix_truncsfdi_sse = 171,
  CODE_FOR_fix_truncdfsi_sse = 172,
  CODE_FOR_fix_truncdfdi_sse = 173,
  CODE_FOR_fix_trunchi_fisttp_i387_1 = 174,
  CODE_FOR_fix_truncsi_fisttp_i387_1 = 175,
  CODE_FOR_fix_truncdi_fisttp_i387_1 = 176,
  CODE_FOR_fix_trunchi_i387_fisttp = 177,
  CODE_FOR_fix_truncsi_i387_fisttp = 178,
  CODE_FOR_fix_truncdi_i387_fisttp = 179,
  CODE_FOR_fix_trunchi_i387_fisttp_with_temp = 180,
  CODE_FOR_fix_truncsi_i387_fisttp_with_temp = 181,
  CODE_FOR_fix_truncdi_i387_fisttp_with_temp = 182,
  CODE_FOR_fix_truncdi_i387 = 186,
  CODE_FOR_fix_truncdi_i387_with_temp = 187,
  CODE_FOR_fix_trunchi_i387 = 188,
  CODE_FOR_fix_truncsi_i387 = 189,
  CODE_FOR_fix_trunchi_i387_with_temp = 190,
  CODE_FOR_fix_truncsi_i387_with_temp = 191,
  CODE_FOR_x86_fnstcw_1 = 192,
  CODE_FOR_x86_fldcw_1 = 193,
  CODE_FOR_floathisf2 = 194,
  CODE_FOR_floathidf2 = 195,
  CODE_FOR_floathixf2 = 196,
  CODE_FOR_floatsixf2 = 197,
  CODE_FOR_floatdixf2 = 198,
  CODE_FOR_floatdisf2_i387_with_xmm = 207,
  CODE_FOR_floatdidf2_i387_with_xmm = 208,
  CODE_FOR_floatdixf2_i387_with_xmm = 209,
  CODE_FOR_addsi_1_zext = 219,
  CODE_FOR_addqi_ext_1 = 241,
  CODE_FOR_addqi3_carry = 282,
  CODE_FOR_addhi3_carry = 283,
  CODE_FOR_addsi3_carry = 284,
  CODE_FOR_adddi3_carry = 285,
  CODE_FOR_addcarrysi = 287,
  CODE_FOR_addcarrydi = 288,
  CODE_FOR_subqi3_carry = 289,
  CODE_FOR_subhi3_carry = 290,
  CODE_FOR_subsi3_carry = 291,
  CODE_FOR_subdi3_carry = 292,
  CODE_FOR_subborrowsi = 294,
  CODE_FOR_subborrowdi = 295,
  CODE_FOR_divmodsi4_1 = 338,
  CODE_FOR_divmoddi4_1 = 339,
  CODE_FOR_divmodhiqi3 = 346,
  CODE_FOR_udivmodsi4_1 = 347,
  CODE_FOR_udivmoddi4_1 = 348,
  CODE_FOR_udivmodhiqi3 = 357,
  CODE_FOR_kandnqi = 386,
  CODE_FOR_kandnhi = 387,
  CODE_FOR_andqi_ext_0 = 395,
  CODE_FOR_kxnorqi = 421,
  CODE_FOR_kxnorhi = 422,
  CODE_FOR_kxnorsi = 423,
  CODE_FOR_kxnordi = 424,
  CODE_FOR_kortestzhi = 425,
  CODE_FOR_kortestchi = 426,
  CODE_FOR_kunpckhi = 427,
  CODE_FOR_kunpcksi = 428,
  CODE_FOR_kunpckdi = 429,
  CODE_FOR_copysignsf3_const = 487,
  CODE_FOR_copysigndf3_const = 488,
  CODE_FOR_copysigntf3_const = 489,
  CODE_FOR_copysignsf3_var = 490,
  CODE_FOR_copysigndf3_var = 491,
  CODE_FOR_copysigntf3_var = 492,
  CODE_FOR_x86_64_shld = 505,
  CODE_FOR_x86_shld = 506,
  CODE_FOR_x86_64_shrd = 535,
  CODE_FOR_x86_shrd = 536,
  CODE_FOR_ashrdi3_cvt = 537,
  CODE_FOR_ashrsi3_cvt = 538,
  CODE_FOR_ix86_rotldi3_doubleword = 580,
  CODE_FOR_ix86_rotlti3_doubleword = 581,
  CODE_FOR_ix86_rotrdi3_doubleword = 582,
  CODE_FOR_ix86_rotrti3_doubleword = 583,
  CODE_FOR_setcc_sf_sse = 609,
  CODE_FOR_setcc_df_sse = 610,
  CODE_FOR_jump_bnd = 653,
  CODE_FOR_jump = 654,
  CODE_FOR_blockage = 679,
  CODE_FOR_prologue_use = 681,
  CODE_FOR_simple_return_internal = 682,
  CODE_FOR_simple_return_internal_long = 683,
  CODE_FOR_simple_return_pop_internal = 684,
  CODE_FOR_simple_return_indirect_internal = 685,
  CODE_FOR_nop = 686,
  CODE_FOR_nops = 687,
  CODE_FOR_pad = 688,
  CODE_FOR_set_got = 689,
  CODE_FOR_set_got_labelled = 690,
  CODE_FOR_set_got_rex64 = 691,
  CODE_FOR_set_rip_rex64 = 692,
  CODE_FOR_set_got_offset_rex64 = 693,
  CODE_FOR_eh_return_internal = 694,
  CODE_FOR_leave = 695,
  CODE_FOR_leave_rex64 = 696,
  CODE_FOR_split_stack_return = 697,
  CODE_FOR_ffssi2_no_cmove = 698,
  CODE_FOR_bmi_bextr_si = 719,
  CODE_FOR_bmi_bextr_di = 720,
  CODE_FOR_bmi2_pdep_si3 = 731,
  CODE_FOR_bmi2_pdep_di3 = 732,
  CODE_FOR_bmi2_pext_si3 = 733,
  CODE_FOR_bmi2_pext_di3 = 734,
  CODE_FOR_tbm_bextri_si = 735,
  CODE_FOR_tbm_bextri_di = 736,
  CODE_FOR_bsr_rex64 = 755,
  CODE_FOR_bsr = 756,
  CODE_FOR_bswaphi_lowpart = 770,
  CODE_FOR_paritydi2_cmp = 771,
  CODE_FOR_paritysi2_cmp = 772,
#define CODE_FOR_tls_initial_exec_64_sun CODE_FOR_nothing
  CODE_FOR_truncxfsf2_i387_noop_unspec = 833,
  CODE_FOR_truncxfdf2_i387_noop_unspec = 834,
  CODE_FOR_sqrtxf2 = 835,
  CODE_FOR_sqrt_extendsfxf2_i387 = 836,
  CODE_FOR_sqrt_extenddfxf2_i387 = 837,
  CODE_FOR_fpremxf4_i387 = 841,
  CODE_FOR_fprem1xf4_i387 = 842,
  CODE_FOR_sincosxf3 = 849,
  CODE_FOR_sincos_extendsfxf3_i387 = 850,
  CODE_FOR_sincos_extenddfxf3_i387 = 851,
  CODE_FOR_fptanxf4_i387 = 852,
  CODE_FOR_fptan_extendsfxf4_i387 = 853,
  CODE_FOR_fptan_extenddfxf4_i387 = 854,
  CODE_FOR_fpatan_extendsfxf3_i387 = 856,
  CODE_FOR_fpatan_extenddfxf3_i387 = 857,
  CODE_FOR_fyl2xxf3_i387 = 858,
  CODE_FOR_fyl2x_extendsfxf3_i387 = 859,
  CODE_FOR_fyl2x_extenddfxf3_i387 = 860,
  CODE_FOR_fyl2xp1xf3_i387 = 861,
  CODE_FOR_fyl2xp1_extendsfxf3_i387 = 862,
  CODE_FOR_fyl2xp1_extenddfxf3_i387 = 863,
  CODE_FOR_fxtractxf3_i387 = 864,
  CODE_FOR_fxtract_extendsfxf3_i387 = 865,
  CODE_FOR_fxtract_extenddfxf3_i387 = 866,
  CODE_FOR_fscalexf4_i387 = 868,
  CODE_FOR_sse4_1_roundsf2 = 869,
  CODE_FOR_sse4_1_rounddf2 = 870,
  CODE_FOR_rintxf2 = 871,
  CODE_FOR_fistdi2 = 873,
  CODE_FOR_fistdi2_with_temp = 874,
  CODE_FOR_fisthi2 = 877,
  CODE_FOR_fistsi2 = 878,
  CODE_FOR_fisthi2_with_temp = 879,
  CODE_FOR_fistsi2_with_temp = 880,
  CODE_FOR_frndintxf2_floor = 881,
  CODE_FOR_frndintxf2_ceil = 882,
  CODE_FOR_frndintxf2_trunc = 883,
  CODE_FOR_frndintxf2_floor_i387 = 884,
  CODE_FOR_frndintxf2_ceil_i387 = 885,
  CODE_FOR_frndintxf2_trunc_i387 = 886,
  CODE_FOR_frndintxf2_mask_pm = 887,
  CODE_FOR_frndintxf2_mask_pm_i387 = 888,
  CODE_FOR_fistdi2_floor = 895,
  CODE_FOR_fistdi2_ceil = 896,
  CODE_FOR_fistdi2_floor_with_temp = 897,
  CODE_FOR_fistdi2_ceil_with_temp = 898,
  CODE_FOR_fisthi2_floor = 899,
  CODE_FOR_fisthi2_ceil = 900,
  CODE_FOR_fistsi2_floor = 901,
  CODE_FOR_fistsi2_ceil = 902,
  CODE_FOR_fisthi2_floor_with_temp = 903,
  CODE_FOR_fisthi2_ceil_with_temp = 904,
  CODE_FOR_fistsi2_floor_with_temp = 905,
  CODE_FOR_fistsi2_ceil_with_temp = 906,
  CODE_FOR_fxamsf2_i387 = 907,
  CODE_FOR_fxamdf2_i387 = 908,
  CODE_FOR_fxamxf2_i387 = 909,
  CODE_FOR_fxamsf2_i387_with_temp = 910,
  CODE_FOR_fxamdf2_i387_with_temp = 911,
  CODE_FOR_movmsk_df = 912,
  CODE_FOR_cld = 913,
  CODE_FOR_smaxsf3 = 963,
  CODE_FOR_sminsf3 = 964,
  CODE_FOR_smaxdf3 = 965,
  CODE_FOR_smindf3 = 966,
  CODE_FOR_pro_epilogue_adjust_stack_si_add = 971,
  CODE_FOR_pro_epilogue_adjust_stack_di_add = 972,
  CODE_FOR_pro_epilogue_adjust_stack_si_sub = 973,
  CODE_FOR_pro_epilogue_adjust_stack_di_sub = 974,
  CODE_FOR_allocate_stack_worker_probe_si = 975,
  CODE_FOR_allocate_stack_worker_probe_di = 976,
  CODE_FOR_adjust_stack_and_probesi = 977,
  CODE_FOR_adjust_stack_and_probedi = 978,
  CODE_FOR_probe_stack_rangesi = 979,
  CODE_FOR_probe_stack_rangedi = 980,
  CODE_FOR_trap = 981,
  CODE_FOR_stack_protect_set_si = 985,
  CODE_FOR_stack_protect_set_di = 986,
  CODE_FOR_stack_tls_protect_set_si = 987,
  CODE_FOR_stack_tls_protect_set_di = 988,
  CODE_FOR_stack_protect_test_si = 989,
  CODE_FOR_stack_protect_test_di = 990,
  CODE_FOR_stack_tls_protect_test_si = 991,
  CODE_FOR_stack_tls_protect_test_di = 992,
  CODE_FOR_sse4_2_crc32qi = 993,
  CODE_FOR_sse4_2_crc32hi = 994,
  CODE_FOR_sse4_2_crc32si = 995,
  CODE_FOR_sse4_2_crc32di = 996,
  CODE_FOR_rdpmc = 997,
  CODE_FOR_rdpmc_rex64 = 998,
  CODE_FOR_rdtsc = 999,
  CODE_FOR_rdtsc_rex64 = 1000,
  CODE_FOR_rdtscp = 1001,
  CODE_FOR_rdtscp_rex64 = 1002,
  CODE_FOR_fxsave = 1003,
  CODE_FOR_fxsave64 = 1004,
  CODE_FOR_fxrstor = 1005,
  CODE_FOR_fxrstor64 = 1006,
  CODE_FOR_xsave = 1007,
  CODE_FOR_xsaveopt = 1008,
  CODE_FOR_xsavec = 1009,
  CODE_FOR_xsaves = 1010,
  CODE_FOR_xsave_rex64 = 1011,
  CODE_FOR_xsaveopt_rex64 = 1012,
  CODE_FOR_xsavec_rex64 = 1013,
  CODE_FOR_xsaves_rex64 = 1014,
  CODE_FOR_xsave64 = 1015,
  CODE_FOR_xsaveopt64 = 1016,
  CODE_FOR_xsavec64 = 1017,
  CODE_FOR_xsaves64 = 1018,
  CODE_FOR_xrstor = 1019,
  CODE_FOR_xrstors = 1020,
  CODE_FOR_xrstor_rex64 = 1021,
  CODE_FOR_xrstors_rex64 = 1022,
  CODE_FOR_xrstor64 = 1023,
  CODE_FOR_xrstors64 = 1024,
  CODE_FOR_fnstenv = 1025,
  CODE_FOR_fldenv = 1026,
  CODE_FOR_fnstsw = 1027,
  CODE_FOR_fnclex = 1028,
  CODE_FOR_lwp_slwpcbsi = 1031,
  CODE_FOR_lwp_slwpcbdi = 1032,
  CODE_FOR_rdfsbasesi = 1037,
  CODE_FOR_rdgsbasesi = 1038,
  CODE_FOR_rdfsbasedi = 1039,
  CODE_FOR_rdgsbasedi = 1040,
  CODE_FOR_wrfsbasesi = 1041,
  CODE_FOR_wrgsbasesi = 1042,
  CODE_FOR_wrfsbasedi = 1043,
  CODE_FOR_wrgsbasedi = 1044,
  CODE_FOR_rdrandhi_1 = 1045,
  CODE_FOR_rdrandsi_1 = 1046,
  CODE_FOR_rdranddi_1 = 1047,
  CODE_FOR_rdseedhi_1 = 1048,
  CODE_FOR_rdseedsi_1 = 1049,
  CODE_FOR_rdseeddi_1 = 1050,
  CODE_FOR_xbegin_1 = 1052,
  CODE_FOR_xend = 1053,
  CODE_FOR_xabort = 1054,
  CODE_FOR_xtest_1 = 1055,
  CODE_FOR_pcommit = 1056,
  CODE_FOR_clwb = 1057,
  CODE_FOR_clflushopt = 1058,
  CODE_FOR_mwaitx = 1059,
  CODE_FOR_monitorx_si = 1060,
  CODE_FOR_monitorx_di = 1061,
  CODE_FOR_move_size_reloc_si = 1076,
  CODE_FOR_move_size_reloc_di = 1077,
  CODE_FOR_sse_movntq = 1083,
  CODE_FOR_mmx_rcpv2sf2 = 1091,
  CODE_FOR_mmx_rcpit1v2sf3 = 1092,
  CODE_FOR_mmx_rcpit2v2sf3 = 1093,
  CODE_FOR_mmx_rsqrtv2sf2 = 1094,
  CODE_FOR_mmx_rsqit1v2sf3 = 1095,
  CODE_FOR_mmx_haddv2sf3 = 1096,
  CODE_FOR_mmx_hsubv2sf3 = 1097,
  CODE_FOR_mmx_addsubv2sf3 = 1098,
  CODE_FOR_mmx_gtv2sf3 = 1100,
  CODE_FOR_mmx_gev2sf3 = 1101,
  CODE_FOR_mmx_pf2id = 1102,
  CODE_FOR_mmx_pf2iw = 1103,
  CODE_FOR_mmx_pi2fw = 1104,
  CODE_FOR_mmx_floatv2si2 = 1105,
  CODE_FOR_mmx_pswapdv2sf2 = 1106,
  CODE_FOR_mmx_ashrv4hi3 = 1137,
  CODE_FOR_mmx_ashrv2si3 = 1138,
  CODE_FOR_mmx_ashlv4hi3 = 1139,
  CODE_FOR_mmx_lshrv4hi3 = 1140,
  CODE_FOR_mmx_ashlv2si3 = 1141,
  CODE_FOR_mmx_lshrv2si3 = 1142,
  CODE_FOR_mmx_ashlv1di3 = 1143,
  CODE_FOR_mmx_lshrv1di3 = 1144,
  CODE_FOR_mmx_gtv8qi3 = 1148,
  CODE_FOR_mmx_gtv4hi3 = 1149,
  CODE_FOR_mmx_gtv2si3 = 1150,
  CODE_FOR_mmx_andnotv8qi3 = 1151,
  CODE_FOR_mmx_andnotv4hi3 = 1152,
  CODE_FOR_mmx_andnotv2si3 = 1153,
  CODE_FOR_mmx_packsswb = 1163,
  CODE_FOR_mmx_packssdw = 1164,
  CODE_FOR_mmx_packuswb = 1165,
  CODE_FOR_mmx_punpckhbw = 1166,
  CODE_FOR_mmx_punpcklbw = 1167,
  CODE_FOR_mmx_punpckhwd = 1168,
  CODE_FOR_mmx_punpcklwd = 1169,
  CODE_FOR_mmx_punpckhdq = 1170,
  CODE_FOR_mmx_punpckldq = 1171,
  CODE_FOR_mmx_pextrw = 1173,
  CODE_FOR_mmx_pshufw_1 = 1174,
  CODE_FOR_mmx_pswapdv2si2 = 1175,
  CODE_FOR_mmx_psadbw = 1184,
  CODE_FOR_mmx_pmovmskb = 1185,
  CODE_FOR_avx512f_loadv16si_mask = 1211,
  CODE_FOR_avx512vl_loadv8si_mask = 1212,
  CODE_FOR_avx512vl_loadv4si_mask = 1213,
  CODE_FOR_avx512f_loadv8di_mask = 1214,
  CODE_FOR_avx512vl_loadv4di_mask = 1215,
  CODE_FOR_avx512vl_loadv2di_mask = 1216,
  CODE_FOR_avx512f_loadv16sf_mask = 1217,
  CODE_FOR_avx512vl_loadv8sf_mask = 1218,
  CODE_FOR_avx512vl_loadv4sf_mask = 1219,
  CODE_FOR_avx512f_loadv8df_mask = 1220,
  CODE_FOR_avx512vl_loadv4df_mask = 1221,
  CODE_FOR_avx512vl_loadv2df_mask = 1222,
  CODE_FOR_avx512bw_loadv64qi_mask = 1223,
  CODE_FOR_avx512vl_loadv16qi_mask = 1224,
  CODE_FOR_avx512vl_loadv32qi_mask = 1225,
  CODE_FOR_avx512bw_loadv32hi_mask = 1226,
  CODE_FOR_avx512vl_loadv16hi_mask = 1227,
  CODE_FOR_avx512vl_loadv8hi_mask = 1228,
  CODE_FOR_avx512f_blendmv16si = 1229,
  CODE_FOR_avx512vl_blendmv8si = 1230,
  CODE_FOR_avx512vl_blendmv4si = 1231,
  CODE_FOR_avx512f_blendmv8di = 1232,
  CODE_FOR_avx512vl_blendmv4di = 1233,
  CODE_FOR_avx512vl_blendmv2di = 1234,
  CODE_FOR_avx512f_blendmv16sf = 1235,
  CODE_FOR_avx512vl_blendmv8sf = 1236,
  CODE_FOR_avx512vl_blendmv4sf = 1237,
  CODE_FOR_avx512f_blendmv8df = 1238,
  CODE_FOR_avx512vl_blendmv4df = 1239,
  CODE_FOR_avx512vl_blendmv2df = 1240,
  CODE_FOR_avx512bw_blendmv64qi = 1241,
  CODE_FOR_avx512vl_blendmv16qi = 1242,
  CODE_FOR_avx512vl_blendmv32qi = 1243,
  CODE_FOR_avx512bw_blendmv32hi = 1244,
  CODE_FOR_avx512vl_blendmv16hi = 1245,
  CODE_FOR_avx512vl_blendmv8hi = 1246,
  CODE_FOR_avx512f_storev16si_mask = 1247,
  CODE_FOR_avx512vl_storev8si_mask = 1248,
  CODE_FOR_avx512vl_storev4si_mask = 1249,
  CODE_FOR_avx512f_storev8di_mask = 1250,
  CODE_FOR_avx512vl_storev4di_mask = 1251,
  CODE_FOR_avx512vl_storev2di_mask = 1252,
  CODE_FOR_avx512f_storev16sf_mask = 1253,
  CODE_FOR_avx512vl_storev8sf_mask = 1254,
  CODE_FOR_avx512vl_storev4sf_mask = 1255,
  CODE_FOR_avx512f_storev8df_mask = 1256,
  CODE_FOR_avx512vl_storev4df_mask = 1257,
  CODE_FOR_avx512vl_storev2df_mask = 1258,
  CODE_FOR_avx512bw_storev64qi_mask = 1259,
  CODE_FOR_avx512vl_storev16qi_mask = 1260,
  CODE_FOR_avx512vl_storev32qi_mask = 1261,
  CODE_FOR_avx512bw_storev32hi_mask = 1262,
  CODE_FOR_avx512vl_storev16hi_mask = 1263,
  CODE_FOR_avx512vl_storev8hi_mask = 1264,
  CODE_FOR_sse2_movq128 = 1265,
  CODE_FOR_movdi_to_sse = 1266,
  CODE_FOR_avx512f_storeups512 = 1279,
  CODE_FOR_avx_storeups256 = 1280,
  CODE_FOR_sse_storeups = 1281,
  CODE_FOR_avx512f_storeupd512 = 1282,
  CODE_FOR_avx_storeupd256 = 1283,
  CODE_FOR_sse2_storeupd = 1284,
  CODE_FOR_avx512f_storeups512_mask = 1285,
  CODE_FOR_avx512vl_storeups256_mask = 1286,
  CODE_FOR_avx512vl_storeups_mask = 1287,
  CODE_FOR_avx512f_storeupd512_mask = 1288,
  CODE_FOR_avx512vl_storeupd256_mask = 1289,
  CODE_FOR_avx512vl_storeupd_mask = 1290,
  CODE_FOR_avx_storedquv32qi = 1315,
  CODE_FOR_sse2_storedquv16qi = 1316,
  CODE_FOR_avx512f_storedquv64qi = 1317,
  CODE_FOR_avx512bw_storedquv32hi = 1318,
  CODE_FOR_avx512vl_storedquv8hi = 1319,
  CODE_FOR_avx512vl_storedquv16hi = 1320,
  CODE_FOR_avx512f_storedquv16si = 1321,
  CODE_FOR_avx_storedquv8si = 1322,
  CODE_FOR_sse2_storedquv4si = 1323,
  CODE_FOR_avx512f_storedquv8di = 1324,
  CODE_FOR_avx512vl_storedquv4di = 1325,
  CODE_FOR_avx512vl_storedquv2di = 1326,
  CODE_FOR_avx512f_storedquv16si_mask = 1327,
  CODE_FOR_avx512vl_storedquv8si_mask = 1328,
  CODE_FOR_avx512vl_storedquv4si_mask = 1329,
  CODE_FOR_avx512f_storedquv8di_mask = 1330,
  CODE_FOR_avx512vl_storedquv4di_mask = 1331,
  CODE_FOR_avx512vl_storedquv2di_mask = 1332,
  CODE_FOR_avx512bw_storedquv64qi_mask = 1333,
  CODE_FOR_avx512vl_storedquv16qi_mask = 1334,
  CODE_FOR_avx512vl_storedquv32qi_mask = 1335,
  CODE_FOR_avx512bw_storedquv32hi_mask = 1336,
  CODE_FOR_avx512vl_storedquv16hi_mask = 1337,
  CODE_FOR_avx512vl_storedquv8hi_mask = 1338,
  CODE_FOR_avx_lddqu256 = 1339,
  CODE_FOR_sse3_lddqu = 1340,
  CODE_FOR_sse2_movntisi = 1341,
  CODE_FOR_sse2_movntidi = 1342,
  CODE_FOR_avx512f_movntv16sf = 1343,
  CODE_FOR_avx_movntv8sf = 1344,
  CODE_FOR_sse_movntv4sf = 1345,
  CODE_FOR_avx512f_movntv8df = 1346,
  CODE_FOR_avx_movntv4df = 1347,
  CODE_FOR_sse2_movntv2df = 1348,
  CODE_FOR_avx512f_movntv8di = 1349,
  CODE_FOR_avx_movntv4di = 1350,
  CODE_FOR_sse2_movntv2di = 1351,
  CODE_FOR_sse_vmaddv4sf3 = 1406,
  CODE_FOR_sse_vmaddv4sf3_round = 1407,
  CODE_FOR_sse_vmsubv4sf3 = 1408,
  CODE_FOR_sse_vmsubv4sf3_round = 1409,
  CODE_FOR_sse2_vmaddv2df3 = 1410,
  CODE_FOR_sse2_vmaddv2df3_round = 1411,
  CODE_FOR_sse2_vmsubv2df3 = 1412,
  CODE_FOR_sse2_vmsubv2df3_round = 1413,
  CODE_FOR_sse_vmmulv4sf3 = 1438,
  CODE_FOR_sse_vmmulv4sf3_round = 1439,
  CODE_FOR_sse_vmdivv4sf3 = 1440,
  CODE_FOR_sse_vmdivv4sf3_round = 1441,
  CODE_FOR_sse2_vmmulv2df3 = 1442,
  CODE_FOR_sse2_vmmulv2df3_round = 1443,
  CODE_FOR_sse2_vmdivv2df3 = 1444,
  CODE_FOR_sse2_vmdivv2df3_round = 1445,
  CODE_FOR_avx512f_divv16sf3 = 1446,
  CODE_FOR_avx512f_divv16sf3_round = 1447,
  CODE_FOR_avx512f_divv16sf3_mask = 1448,
  CODE_FOR_avx512f_divv16sf3_mask_round = 1449,
  CODE_FOR_avx_divv8sf3 = 1450,
#define CODE_FOR_avx_divv8sf3_round CODE_FOR_nothing
  CODE_FOR_avx_divv8sf3_mask = 1451,
#define CODE_FOR_avx_divv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_sse_divv4sf3 = 1452,
#define CODE_FOR_sse_divv4sf3_round CODE_FOR_nothing
  CODE_FOR_sse_divv4sf3_mask = 1453,
#define CODE_FOR_sse_divv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_divv8df3 = 1454,
  CODE_FOR_avx512f_divv8df3_round = 1455,
  CODE_FOR_avx512f_divv8df3_mask = 1456,
  CODE_FOR_avx512f_divv8df3_mask_round = 1457,
  CODE_FOR_avx_divv4df3 = 1458,
#define CODE_FOR_avx_divv4df3_round CODE_FOR_nothing
  CODE_FOR_avx_divv4df3_mask = 1459,
#define CODE_FOR_avx_divv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_sse2_divv2df3 = 1460,
#define CODE_FOR_sse2_divv2df3_round CODE_FOR_nothing
  CODE_FOR_sse2_divv2df3_mask = 1461,
#define CODE_FOR_sse2_divv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_avx_rcpv8sf2 = 1462,
  CODE_FOR_sse_rcpv4sf2 = 1463,
  CODE_FOR_sse_vmrcpv4sf2 = 1464,
  CODE_FOR_rcp14v16sf_mask = 1466,
  CODE_FOR_rcp14v8sf_mask = 1468,
  CODE_FOR_rcp14v4sf_mask = 1470,
  CODE_FOR_rcp14v8df_mask = 1472,
  CODE_FOR_rcp14v4df_mask = 1474,
  CODE_FOR_rcp14v2df_mask = 1476,
  CODE_FOR_srcp14v4sf = 1477,
  CODE_FOR_srcp14v2df = 1478,
  CODE_FOR_avx512f_sqrtv16sf2 = 1479,
  CODE_FOR_avx512f_sqrtv16sf2_round = 1480,
  CODE_FOR_avx512f_sqrtv16sf2_mask = 1481,
  CODE_FOR_avx512f_sqrtv16sf2_mask_round = 1482,
  CODE_FOR_avx_sqrtv8sf2 = 1483,
#define CODE_FOR_avx_sqrtv8sf2_round CODE_FOR_nothing
  CODE_FOR_avx_sqrtv8sf2_mask = 1484,
#define CODE_FOR_avx_sqrtv8sf2_mask_round CODE_FOR_nothing
  CODE_FOR_sse_sqrtv4sf2 = 1485,
#define CODE_FOR_sse_sqrtv4sf2_round CODE_FOR_nothing
  CODE_FOR_sse_sqrtv4sf2_mask = 1486,
#define CODE_FOR_sse_sqrtv4sf2_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_sqrtv8df2 = 1487,
  CODE_FOR_avx512f_sqrtv8df2_round = 1488,
  CODE_FOR_avx512f_sqrtv8df2_mask = 1489,
  CODE_FOR_avx512f_sqrtv8df2_mask_round = 1490,
  CODE_FOR_avx_sqrtv4df2 = 1491,
#define CODE_FOR_avx_sqrtv4df2_round CODE_FOR_nothing
  CODE_FOR_avx_sqrtv4df2_mask = 1492,
#define CODE_FOR_avx_sqrtv4df2_mask_round CODE_FOR_nothing
  CODE_FOR_sse2_sqrtv2df2 = 1493,
#define CODE_FOR_sse2_sqrtv2df2_round CODE_FOR_nothing
  CODE_FOR_sse2_sqrtv2df2_mask = 1494,
#define CODE_FOR_sse2_sqrtv2df2_mask_round CODE_FOR_nothing
  CODE_FOR_sse_vmsqrtv4sf2 = 1495,
  CODE_FOR_sse_vmsqrtv4sf2_round = 1496,
  CODE_FOR_sse2_vmsqrtv2df2 = 1497,
  CODE_FOR_sse2_vmsqrtv2df2_round = 1498,
  CODE_FOR_avx_rsqrtv8sf2 = 1499,
  CODE_FOR_sse_rsqrtv4sf2 = 1500,
  CODE_FOR_rsqrt14v16sf_mask = 1502,
  CODE_FOR_rsqrt14v8sf_mask = 1504,
  CODE_FOR_rsqrt14v4sf_mask = 1506,
  CODE_FOR_rsqrt14v8df_mask = 1508,
  CODE_FOR_rsqrt14v4df_mask = 1510,
  CODE_FOR_rsqrt14v2df_mask = 1512,
  CODE_FOR_rsqrt14v4sf = 1513,
  CODE_FOR_rsqrt14v2df = 1514,
  CODE_FOR_sse_vmrsqrtv4sf2 = 1515,
  CODE_FOR_sse_vmsmaxv4sf3 = 1596,
  CODE_FOR_sse_vmsmaxv4sf3_round = 1597,
  CODE_FOR_sse_vmsminv4sf3 = 1598,
  CODE_FOR_sse_vmsminv4sf3_round = 1599,
  CODE_FOR_sse2_vmsmaxv2df3 = 1600,
  CODE_FOR_sse2_vmsmaxv2df3_round = 1601,
  CODE_FOR_sse2_vmsminv2df3 = 1602,
  CODE_FOR_sse2_vmsminv2df3_round = 1603,
  CODE_FOR_avx_addsubv4df3 = 1616,
  CODE_FOR_sse3_addsubv2df3 = 1617,
  CODE_FOR_avx_addsubv8sf3 = 1618,
  CODE_FOR_sse3_addsubv4sf3 = 1619,
  CODE_FOR_avx_haddv4df3 = 1620,
  CODE_FOR_avx_hsubv4df3 = 1621,
  CODE_FOR_sse3_hsubv2df3 = 1623,
  CODE_FOR_avx_haddv8sf3 = 1626,
  CODE_FOR_avx_hsubv8sf3 = 1627,
  CODE_FOR_sse3_haddv4sf3 = 1628,
  CODE_FOR_sse3_hsubv4sf3 = 1629,
  CODE_FOR_reducepv16sf_mask = 1631,
  CODE_FOR_reducepv8sf_mask = 1633,
  CODE_FOR_reducepv4sf_mask = 1635,
  CODE_FOR_reducepv8df_mask = 1637,
  CODE_FOR_reducepv4df_mask = 1639,
  CODE_FOR_reducepv2df_mask = 1641,
  CODE_FOR_reducesv4sf = 1642,
  CODE_FOR_reducesv2df = 1643,
  CODE_FOR_avx_cmpv8sf3 = 1644,
  CODE_FOR_avx_cmpv4sf3 = 1645,
  CODE_FOR_avx_cmpv4df3 = 1646,
  CODE_FOR_avx_cmpv2df3 = 1647,
  CODE_FOR_avx_vmcmpv4sf3 = 1648,
  CODE_FOR_avx_vmcmpv2df3 = 1649,
  CODE_FOR_avx_maskcmpv8sf3 = 1654,
  CODE_FOR_sse_maskcmpv4sf3 = 1655,
  CODE_FOR_avx_maskcmpv4df3 = 1656,
  CODE_FOR_sse2_maskcmpv2df3 = 1657,
  CODE_FOR_sse_vmmaskcmpv4sf3 = 1658,
  CODE_FOR_sse2_vmmaskcmpv2df3 = 1659,
  CODE_FOR_avx512f_cmpv16si3 = 1660,
  CODE_FOR_avx512f_cmpv16si3_mask = 1661,
  CODE_FOR_avx512f_cmpv16si3_round = 1662,
  CODE_FOR_avx512f_cmpv16si3_mask_round = 1663,
  CODE_FOR_avx512vl_cmpv8si3 = 1664,
  CODE_FOR_avx512vl_cmpv8si3_mask = 1665,
#define CODE_FOR_avx512vl_cmpv8si3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv8si3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_cmpv4si3 = 1666,
  CODE_FOR_avx512vl_cmpv4si3_mask = 1667,
#define CODE_FOR_avx512vl_cmpv4si3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv4si3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_cmpv8di3 = 1668,
  CODE_FOR_avx512f_cmpv8di3_mask = 1669,
  CODE_FOR_avx512f_cmpv8di3_round = 1670,
  CODE_FOR_avx512f_cmpv8di3_mask_round = 1671,
  CODE_FOR_avx512vl_cmpv4di3 = 1672,
  CODE_FOR_avx512vl_cmpv4di3_mask = 1673,
#define CODE_FOR_avx512vl_cmpv4di3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv4di3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_cmpv2di3 = 1674,
  CODE_FOR_avx512vl_cmpv2di3_mask = 1675,
#define CODE_FOR_avx512vl_cmpv2di3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv2di3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_cmpv16sf3 = 1676,
  CODE_FOR_avx512f_cmpv16sf3_mask = 1677,
  CODE_FOR_avx512f_cmpv16sf3_round = 1678,
  CODE_FOR_avx512f_cmpv16sf3_mask_round = 1679,
  CODE_FOR_avx512vl_cmpv8sf3 = 1680,
  CODE_FOR_avx512vl_cmpv8sf3_mask = 1681,
#define CODE_FOR_avx512vl_cmpv8sf3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_cmpv4sf3 = 1682,
  CODE_FOR_avx512vl_cmpv4sf3_mask = 1683,
#define CODE_FOR_avx512vl_cmpv4sf3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_cmpv8df3 = 1684,
  CODE_FOR_avx512f_cmpv8df3_mask = 1685,
  CODE_FOR_avx512f_cmpv8df3_round = 1686,
  CODE_FOR_avx512f_cmpv8df3_mask_round = 1687,
  CODE_FOR_avx512vl_cmpv4df3 = 1688,
  CODE_FOR_avx512vl_cmpv4df3_mask = 1689,
#define CODE_FOR_avx512vl_cmpv4df3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_cmpv2df3 = 1690,
  CODE_FOR_avx512vl_cmpv2df3_mask = 1691,
#define CODE_FOR_avx512vl_cmpv2df3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512bw_cmpv64qi3 = 1692,
  CODE_FOR_avx512bw_cmpv64qi3_mask = 1693,
  CODE_FOR_avx512vl_cmpv16qi3 = 1694,
  CODE_FOR_avx512vl_cmpv16qi3_mask = 1695,
  CODE_FOR_avx512vl_cmpv32qi3 = 1696,
  CODE_FOR_avx512vl_cmpv32qi3_mask = 1697,
  CODE_FOR_avx512bw_cmpv32hi3 = 1698,
  CODE_FOR_avx512bw_cmpv32hi3_mask = 1699,
  CODE_FOR_avx512vl_cmpv16hi3 = 1700,
  CODE_FOR_avx512vl_cmpv16hi3_mask = 1701,
  CODE_FOR_avx512vl_cmpv8hi3 = 1702,
  CODE_FOR_avx512vl_cmpv8hi3_mask = 1703,
  CODE_FOR_avx512bw_ucmpv64qi3 = 1704,
  CODE_FOR_avx512bw_ucmpv64qi3_mask = 1705,
  CODE_FOR_avx512vl_ucmpv16qi3 = 1706,
  CODE_FOR_avx512vl_ucmpv16qi3_mask = 1707,
  CODE_FOR_avx512vl_ucmpv32qi3 = 1708,
  CODE_FOR_avx512vl_ucmpv32qi3_mask = 1709,
  CODE_FOR_avx512bw_ucmpv32hi3 = 1710,
  CODE_FOR_avx512bw_ucmpv32hi3_mask = 1711,
  CODE_FOR_avx512vl_ucmpv16hi3 = 1712,
  CODE_FOR_avx512vl_ucmpv16hi3_mask = 1713,
  CODE_FOR_avx512vl_ucmpv8hi3 = 1714,
  CODE_FOR_avx512vl_ucmpv8hi3_mask = 1715,
  CODE_FOR_avx512f_ucmpv16si3 = 1716,
  CODE_FOR_avx512f_ucmpv16si3_mask = 1717,
  CODE_FOR_avx512vl_ucmpv8si3 = 1718,
  CODE_FOR_avx512vl_ucmpv8si3_mask = 1719,
  CODE_FOR_avx512vl_ucmpv4si3 = 1720,
  CODE_FOR_avx512vl_ucmpv4si3_mask = 1721,
  CODE_FOR_avx512f_ucmpv8di3 = 1722,
  CODE_FOR_avx512f_ucmpv8di3_mask = 1723,
  CODE_FOR_avx512vl_ucmpv4di3 = 1724,
  CODE_FOR_avx512vl_ucmpv4di3_mask = 1725,
  CODE_FOR_avx512vl_ucmpv2di3 = 1726,
  CODE_FOR_avx512vl_ucmpv2di3_mask = 1727,
  CODE_FOR_avx512f_vmcmpv4sf3 = 1728,
  CODE_FOR_avx512f_vmcmpv4sf3_round = 1729,
  CODE_FOR_avx512f_vmcmpv2df3 = 1730,
  CODE_FOR_avx512f_vmcmpv2df3_round = 1731,
  CODE_FOR_avx512f_vmcmpv4sf3_mask = 1732,
  CODE_FOR_avx512f_vmcmpv4sf3_mask_round = 1733,
  CODE_FOR_avx512f_vmcmpv2df3_mask = 1734,
  CODE_FOR_avx512f_vmcmpv2df3_mask_round = 1735,
  CODE_FOR_avx512f_maskcmpv16sf3 = 1736,
  CODE_FOR_avx512f_maskcmpv8sf3 = 1737,
  CODE_FOR_avx512f_maskcmpv4sf3 = 1738,
  CODE_FOR_avx512f_maskcmpv8df3 = 1739,
  CODE_FOR_avx512f_maskcmpv4df3 = 1740,
  CODE_FOR_avx512f_maskcmpv2df3 = 1741,
  CODE_FOR_sse_comi = 1742,
  CODE_FOR_sse_comi_round = 1743,
  CODE_FOR_sse2_comi = 1744,
  CODE_FOR_sse2_comi_round = 1745,
  CODE_FOR_sse_ucomi = 1746,
  CODE_FOR_sse_ucomi_round = 1747,
  CODE_FOR_sse2_ucomi = 1748,
  CODE_FOR_sse2_ucomi_round = 1749,
  CODE_FOR_avx_andnotv8sf3 = 1750,
  CODE_FOR_avx_andnotv8sf3_mask = 1751,
  CODE_FOR_sse_andnotv4sf3 = 1752,
  CODE_FOR_sse_andnotv4sf3_mask = 1753,
  CODE_FOR_avx_andnotv4df3 = 1754,
  CODE_FOR_avx_andnotv4df3_mask = 1755,
  CODE_FOR_sse2_andnotv2df3 = 1756,
  CODE_FOR_sse2_andnotv2df3_mask = 1757,
  CODE_FOR_avx512f_andnotv16sf3 = 1758,
  CODE_FOR_avx512f_andnotv16sf3_mask = 1759,
  CODE_FOR_avx512f_andnotv8df3 = 1760,
  CODE_FOR_avx512f_andnotv8df3_mask = 1761,
  CODE_FOR_fma_fmadd_v16sf_maskz_1 = 1819,
  CODE_FOR_fma_fmadd_v16sf_maskz_1_round = 1820,
  CODE_FOR_fma_fmadd_v8sf_maskz_1 = 1822,
#define CODE_FOR_fma_fmadd_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmadd_v4sf_maskz_1 = 1824,
#define CODE_FOR_fma_fmadd_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmadd_v8df_maskz_1 = 1828,
  CODE_FOR_fma_fmadd_v8df_maskz_1_round = 1829,
  CODE_FOR_fma_fmadd_v4df_maskz_1 = 1831,
#define CODE_FOR_fma_fmadd_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmadd_v2df_maskz_1 = 1833,
#define CODE_FOR_fma_fmadd_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmadd_v16sf_mask = 1834,
  CODE_FOR_avx512f_fmadd_v16sf_mask_round = 1835,
  CODE_FOR_avx512vl_fmadd_v8sf_mask = 1836,
#define CODE_FOR_avx512vl_fmadd_v8sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fmadd_v4sf_mask = 1837,
#define CODE_FOR_avx512vl_fmadd_v4sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmadd_v8df_mask = 1838,
  CODE_FOR_avx512f_fmadd_v8df_mask_round = 1839,
  CODE_FOR_avx512vl_fmadd_v4df_mask = 1840,
#define CODE_FOR_avx512vl_fmadd_v4df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fmadd_v2df_mask = 1841,
#define CODE_FOR_avx512vl_fmadd_v2df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmadd_v16sf_mask3 = 1842,
  CODE_FOR_avx512f_fmadd_v16sf_mask3_round = 1843,
  CODE_FOR_avx512vl_fmadd_v8sf_mask3 = 1844,
  CODE_FOR_avx512vl_fmadd_v8sf_mask3_round = 1845,
  CODE_FOR_avx512vl_fmadd_v4sf_mask3 = 1846,
  CODE_FOR_avx512vl_fmadd_v4sf_mask3_round = 1847,
  CODE_FOR_avx512f_fmadd_v8df_mask3 = 1848,
  CODE_FOR_avx512f_fmadd_v8df_mask3_round = 1849,
  CODE_FOR_avx512vl_fmadd_v4df_mask3 = 1850,
  CODE_FOR_avx512vl_fmadd_v4df_mask3_round = 1851,
  CODE_FOR_avx512vl_fmadd_v2df_mask3 = 1852,
  CODE_FOR_avx512vl_fmadd_v2df_mask3_round = 1853,
  CODE_FOR_fma_fmsub_v16sf_maskz_1 = 1863,
  CODE_FOR_fma_fmsub_v16sf_maskz_1_round = 1864,
  CODE_FOR_fma_fmsub_v8sf_maskz_1 = 1866,
#define CODE_FOR_fma_fmsub_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsub_v4sf_maskz_1 = 1868,
#define CODE_FOR_fma_fmsub_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsub_v8df_maskz_1 = 1872,
  CODE_FOR_fma_fmsub_v8df_maskz_1_round = 1873,
  CODE_FOR_fma_fmsub_v4df_maskz_1 = 1875,
#define CODE_FOR_fma_fmsub_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsub_v2df_maskz_1 = 1877,
#define CODE_FOR_fma_fmsub_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmsub_v16sf_mask = 1878,
  CODE_FOR_avx512f_fmsub_v16sf_mask_round = 1879,
  CODE_FOR_avx512vl_fmsub_v8sf_mask = 1880,
  CODE_FOR_avx512vl_fmsub_v8sf_mask_round = 1881,
  CODE_FOR_avx512vl_fmsub_v4sf_mask = 1882,
  CODE_FOR_avx512vl_fmsub_v4sf_mask_round = 1883,
  CODE_FOR_avx512f_fmsub_v8df_mask = 1884,
  CODE_FOR_avx512f_fmsub_v8df_mask_round = 1885,
  CODE_FOR_avx512vl_fmsub_v4df_mask = 1886,
  CODE_FOR_avx512vl_fmsub_v4df_mask_round = 1887,
  CODE_FOR_avx512vl_fmsub_v2df_mask = 1888,
  CODE_FOR_avx512vl_fmsub_v2df_mask_round = 1889,
  CODE_FOR_avx512f_fmsub_v16sf_mask3 = 1890,
  CODE_FOR_avx512f_fmsub_v16sf_mask3_round = 1891,
  CODE_FOR_avx512vl_fmsub_v8sf_mask3 = 1892,
#define CODE_FOR_avx512vl_fmsub_v8sf_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fmsub_v4sf_mask3 = 1893,
#define CODE_FOR_avx512vl_fmsub_v4sf_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmsub_v8df_mask3 = 1894,
  CODE_FOR_avx512f_fmsub_v8df_mask3_round = 1895,
  CODE_FOR_avx512vl_fmsub_v4df_mask3 = 1896,
#define CODE_FOR_avx512vl_fmsub_v4df_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fmsub_v2df_mask3 = 1897,
#define CODE_FOR_avx512vl_fmsub_v2df_mask3_round CODE_FOR_nothing
  CODE_FOR_fma_fnmadd_v16sf_maskz_1 = 1907,
  CODE_FOR_fma_fnmadd_v16sf_maskz_1_round = 1908,
  CODE_FOR_fma_fnmadd_v8sf_maskz_1 = 1910,
#define CODE_FOR_fma_fnmadd_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmadd_v4sf_maskz_1 = 1912,
#define CODE_FOR_fma_fnmadd_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmadd_v8df_maskz_1 = 1916,
  CODE_FOR_fma_fnmadd_v8df_maskz_1_round = 1917,
  CODE_FOR_fma_fnmadd_v4df_maskz_1 = 1919,
#define CODE_FOR_fma_fnmadd_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmadd_v2df_maskz_1 = 1921,
#define CODE_FOR_fma_fnmadd_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmadd_v16sf_mask = 1922,
  CODE_FOR_avx512f_fnmadd_v16sf_mask_round = 1923,
  CODE_FOR_avx512vl_fnmadd_v8sf_mask = 1924,
#define CODE_FOR_avx512vl_fnmadd_v8sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmadd_v4sf_mask = 1925,
#define CODE_FOR_avx512vl_fnmadd_v4sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmadd_v8df_mask = 1926,
  CODE_FOR_avx512f_fnmadd_v8df_mask_round = 1927,
  CODE_FOR_avx512vl_fnmadd_v4df_mask = 1928,
#define CODE_FOR_avx512vl_fnmadd_v4df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmadd_v2df_mask = 1929,
#define CODE_FOR_avx512vl_fnmadd_v2df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmadd_v16sf_mask3 = 1930,
  CODE_FOR_avx512f_fnmadd_v16sf_mask3_round = 1931,
  CODE_FOR_avx512vl_fnmadd_v8sf_mask3 = 1932,
#define CODE_FOR_avx512vl_fnmadd_v8sf_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmadd_v4sf_mask3 = 1933,
#define CODE_FOR_avx512vl_fnmadd_v4sf_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmadd_v8df_mask3 = 1934,
  CODE_FOR_avx512f_fnmadd_v8df_mask3_round = 1935,
  CODE_FOR_avx512vl_fnmadd_v4df_mask3 = 1936,
#define CODE_FOR_avx512vl_fnmadd_v4df_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmadd_v2df_mask3 = 1937,
#define CODE_FOR_avx512vl_fnmadd_v2df_mask3_round CODE_FOR_nothing
  CODE_FOR_fma_fnmsub_v16sf_maskz_1 = 1961,
  CODE_FOR_fma_fnmsub_v16sf_maskz_1_round = 1962,
  CODE_FOR_fma_fnmsub_v8sf_maskz_1 = 1964,
#define CODE_FOR_fma_fnmsub_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmsub_v4sf_maskz_1 = 1966,
#define CODE_FOR_fma_fnmsub_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmsub_v8df_maskz_1 = 1970,
  CODE_FOR_fma_fnmsub_v8df_maskz_1_round = 1971,
  CODE_FOR_fma_fnmsub_v4df_maskz_1 = 1973,
#define CODE_FOR_fma_fnmsub_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmsub_v2df_maskz_1 = 1975,
#define CODE_FOR_fma_fnmsub_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmsub_v16sf_mask = 1976,
  CODE_FOR_avx512f_fnmsub_v16sf_mask_round = 1977,
  CODE_FOR_avx512vl_fnmsub_v8sf_mask = 1978,
#define CODE_FOR_avx512vl_fnmsub_v8sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmsub_v4sf_mask = 1979,
#define CODE_FOR_avx512vl_fnmsub_v4sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmsub_v8df_mask = 1980,
  CODE_FOR_avx512f_fnmsub_v8df_mask_round = 1981,
  CODE_FOR_avx512vl_fnmsub_v4df_mask = 1982,
#define CODE_FOR_avx512vl_fnmsub_v4df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmsub_v2df_mask = 1983,
#define CODE_FOR_avx512vl_fnmsub_v2df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmsub_v16sf_mask3 = 1984,
  CODE_FOR_avx512f_fnmsub_v16sf_mask3_round = 1985,
  CODE_FOR_avx512vl_fnmsub_v8sf_mask3 = 1986,
  CODE_FOR_avx512vl_fnmsub_v8sf_mask3_round = 1987,
  CODE_FOR_avx512vl_fnmsub_v4sf_mask3 = 1988,
  CODE_FOR_avx512vl_fnmsub_v4sf_mask3_round = 1989,
  CODE_FOR_avx512f_fnmsub_v8df_mask3 = 1990,
  CODE_FOR_avx512f_fnmsub_v8df_mask3_round = 1991,
  CODE_FOR_avx512vl_fnmsub_v4df_mask3 = 1992,
  CODE_FOR_avx512vl_fnmsub_v4df_mask3_round = 1993,
  CODE_FOR_avx512vl_fnmsub_v2df_mask3 = 1994,
  CODE_FOR_avx512vl_fnmsub_v2df_mask3_round = 1995,
  CODE_FOR_fma_fmaddsub_v16sf_maskz_1 = 2003,
  CODE_FOR_fma_fmaddsub_v16sf_maskz_1_round = 2004,
  CODE_FOR_fma_fmaddsub_v8sf_maskz_1 = 2006,
#define CODE_FOR_fma_fmaddsub_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmaddsub_v4sf_maskz_1 = 2008,
#define CODE_FOR_fma_fmaddsub_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmaddsub_v8df_maskz_1 = 2012,
  CODE_FOR_fma_fmaddsub_v8df_maskz_1_round = 2013,
  CODE_FOR_fma_fmaddsub_v4df_maskz_1 = 2015,
#define CODE_FOR_fma_fmaddsub_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmaddsub_v2df_maskz_1 = 2017,
#define CODE_FOR_fma_fmaddsub_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmaddsub_v16sf_mask = 2018,
  CODE_FOR_avx512f_fmaddsub_v16sf_mask_round = 2019,
  CODE_FOR_avx512vl_fmaddsub_v8sf_mask = 2020,
  CODE_FOR_avx512vl_fmaddsub_v8sf_mask_round = 2021,
  CODE_FOR_avx512vl_fmaddsub_v4sf_mask = 2022,
  CODE_FOR_avx512vl_fmaddsub_v4sf_mask_round = 2023,
  CODE_FOR_avx512f_fmaddsub_v8df_mask = 2024,
  CODE_FOR_avx512f_fmaddsub_v8df_mask_round = 2025,
  CODE_FOR_avx512vl_fmaddsub_v4df_mask = 2026,
  CODE_FOR_avx512vl_fmaddsub_v4df_mask_round = 2027,
  CODE_FOR_avx512vl_fmaddsub_v2df_mask = 2028,
  CODE_FOR_avx512vl_fmaddsub_v2df_mask_round = 2029,
  CODE_FOR_avx512f_fmaddsub_v16sf_mask3 = 2030,
  CODE_FOR_avx512f_fmaddsub_v16sf_mask3_round = 2031,
  CODE_FOR_avx512vl_fmaddsub_v8sf_mask3 = 2032,
  CODE_FOR_avx512vl_fmaddsub_v8sf_mask3_round = 2033,
  CODE_FOR_avx512vl_fmaddsub_v4sf_mask3 = 2034,
  CODE_FOR_avx512vl_fmaddsub_v4sf_mask3_round = 2035,
  CODE_FOR_avx512f_fmaddsub_v8df_mask3 = 2036,
  CODE_FOR_avx512f_fmaddsub_v8df_mask3_round = 2037,
  CODE_FOR_avx512vl_fmaddsub_v4df_mask3 = 2038,
  CODE_FOR_avx512vl_fmaddsub_v4df_mask3_round = 2039,
  CODE_FOR_avx512vl_fmaddsub_v2df_mask3 = 2040,
  CODE_FOR_avx512vl_fmaddsub_v2df_mask3_round = 2041,
  CODE_FOR_fma_fmsubadd_v16sf_maskz_1 = 2049,
  CODE_FOR_fma_fmsubadd_v16sf_maskz_1_round = 2050,
  CODE_FOR_fma_fmsubadd_v8sf_maskz_1 = 2052,
#define CODE_FOR_fma_fmsubadd_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsubadd_v4sf_maskz_1 = 2054,
#define CODE_FOR_fma_fmsubadd_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsubadd_v8df_maskz_1 = 2058,
  CODE_FOR_fma_fmsubadd_v8df_maskz_1_round = 2059,
  CODE_FOR_fma_fmsubadd_v4df_maskz_1 = 2061,
#define CODE_FOR_fma_fmsubadd_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsubadd_v2df_maskz_1 = 2063,
#define CODE_FOR_fma_fmsubadd_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmsubadd_v16sf_mask = 2064,
  CODE_FOR_avx512f_fmsubadd_v16sf_mask_round = 2065,
  CODE_FOR_avx512vl_fmsubadd_v8sf_mask = 2066,
  CODE_FOR_avx512vl_fmsubadd_v8sf_mask_round = 2067,
  CODE_FOR_avx512vl_fmsubadd_v4sf_mask = 2068,
  CODE_FOR_avx512vl_fmsubadd_v4sf_mask_round = 2069,
  CODE_FOR_avx512f_fmsubadd_v8df_mask = 2070,
  CODE_FOR_avx512f_fmsubadd_v8df_mask_round = 2071,
  CODE_FOR_avx512vl_fmsubadd_v4df_mask = 2072,
  CODE_FOR_avx512vl_fmsubadd_v4df_mask_round = 2073,
  CODE_FOR_avx512vl_fmsubadd_v2df_mask = 2074,
  CODE_FOR_avx512vl_fmsubadd_v2df_mask_round = 2075,
  CODE_FOR_avx512f_fmsubadd_v16sf_mask3 = 2076,
  CODE_FOR_avx512f_fmsubadd_v16sf_mask3_round = 2077,
  CODE_FOR_avx512vl_fmsubadd_v8sf_mask3 = 2078,
  CODE_FOR_avx512vl_fmsubadd_v8sf_mask3_round = 2079,
  CODE_FOR_avx512vl_fmsubadd_v4sf_mask3 = 2080,
  CODE_FOR_avx512vl_fmsubadd_v4sf_mask3_round = 2081,
  CODE_FOR_avx512f_fmsubadd_v8df_mask3 = 2082,
  CODE_FOR_avx512f_fmsubadd_v8df_mask3_round = 2083,
  CODE_FOR_avx512vl_fmsubadd_v4df_mask3 = 2084,
  CODE_FOR_avx512vl_fmsubadd_v4df_mask3_round = 2085,
  CODE_FOR_avx512vl_fmsubadd_v2df_mask3 = 2086,
  CODE_FOR_avx512vl_fmsubadd_v2df_mask3_round = 2087,
  CODE_FOR_sse_cvtpi2ps = 2112,
  CODE_FOR_sse_cvtps2pi = 2113,
  CODE_FOR_sse_cvttps2pi = 2114,
  CODE_FOR_sse_cvtsi2ss = 2115,
  CODE_FOR_sse_cvtsi2ss_round = 2116,
  CODE_FOR_sse_cvtsi2ssq = 2117,
  CODE_FOR_sse_cvtsi2ssq_round = 2118,
  CODE_FOR_sse_cvtss2si = 2119,
  CODE_FOR_sse_cvtss2si_round = 2120,
  CODE_FOR_sse_cvtss2si_2 = 2121,
  CODE_FOR_sse_cvtss2siq = 2122,
  CODE_FOR_sse_cvtss2siq_round = 2123,
  CODE_FOR_sse_cvtss2siq_2 = 2124,
  CODE_FOR_sse_cvttss2si = 2125,
  CODE_FOR_sse_cvttss2si_round = 2126,
  CODE_FOR_sse_cvttss2siq = 2127,
  CODE_FOR_sse_cvttss2siq_round = 2128,
  CODE_FOR_cvtusi2ss32 = 2129,
  CODE_FOR_cvtusi2ss32_round = 2130,
  CODE_FOR_cvtusi2sd32 = 2131,
#define CODE_FOR_cvtusi2sd32_round CODE_FOR_nothing
  CODE_FOR_cvtusi2ss64 = 2132,
  CODE_FOR_cvtusi2ss64_round = 2133,
  CODE_FOR_cvtusi2sd64 = 2134,
  CODE_FOR_cvtusi2sd64_round = 2135,
  CODE_FOR_floatv16siv16sf2 = 2136,
  CODE_FOR_floatv16siv16sf2_round = 2137,
  CODE_FOR_floatv16siv16sf2_mask = 2138,
  CODE_FOR_floatv16siv16sf2_mask_round = 2139,
  CODE_FOR_floatv8siv8sf2 = 2140,
#define CODE_FOR_floatv8siv8sf2_round CODE_FOR_nothing
  CODE_FOR_floatv8siv8sf2_mask = 2141,
#define CODE_FOR_floatv8siv8sf2_mask_round CODE_FOR_nothing
  CODE_FOR_floatv4siv4sf2 = 2142,
#define CODE_FOR_floatv4siv4sf2_round CODE_FOR_nothing
  CODE_FOR_floatv4siv4sf2_mask = 2143,
#define CODE_FOR_floatv4siv4sf2_mask_round CODE_FOR_nothing
  CODE_FOR_ufloatv16siv16sf2 = 2144,
  CODE_FOR_ufloatv16siv16sf2_round = 2145,
  CODE_FOR_ufloatv16siv16sf2_mask = 2146,
  CODE_FOR_ufloatv16siv16sf2_mask_round = 2147,
  CODE_FOR_ufloatv8siv8sf2 = 2148,
  CODE_FOR_ufloatv8siv8sf2_round = 2149,
  CODE_FOR_ufloatv8siv8sf2_mask = 2150,
  CODE_FOR_ufloatv8siv8sf2_mask_round = 2151,
  CODE_FOR_ufloatv4siv4sf2 = 2152,
  CODE_FOR_ufloatv4siv4sf2_round = 2153,
  CODE_FOR_ufloatv4siv4sf2_mask = 2154,
  CODE_FOR_ufloatv4siv4sf2_mask_round = 2155,
  CODE_FOR_avx_fix_notruncv8sfv8si = 2156,
  CODE_FOR_avx_fix_notruncv8sfv8si_mask = 2157,
  CODE_FOR_sse2_fix_notruncv4sfv4si = 2158,
  CODE_FOR_sse2_fix_notruncv4sfv4si_mask = 2159,
  CODE_FOR_avx512f_fix_notruncv16sfv16si_mask = 2162,
  CODE_FOR_avx512f_fix_notruncv16sfv16si_mask_round = 2163,
  CODE_FOR_avx512f_ufix_notruncv16sfv16si_mask = 2166,
  CODE_FOR_avx512f_ufix_notruncv16sfv16si_mask_round = 2167,
  CODE_FOR_avx512vl_ufix_notruncv8sfv8si_mask = 2170,
  CODE_FOR_avx512vl_ufix_notruncv8sfv8si_mask_round = 2171,
  CODE_FOR_avx512vl_ufix_notruncv4sfv4si_mask = 2174,
  CODE_FOR_avx512vl_ufix_notruncv4sfv4si_mask_round = 2175,
  CODE_FOR_avx512dq_cvtps2qqv8di_mask = 2178,
  CODE_FOR_avx512dq_cvtps2qqv8di_mask_round = 2179,
  CODE_FOR_avx512dq_cvtps2qqv4di_mask = 2181,
#define CODE_FOR_avx512dq_cvtps2qqv4di_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_cvtps2qqv2di_mask = 2183,
  CODE_FOR_avx512dq_cvtps2uqqv8di_mask = 2186,
  CODE_FOR_avx512dq_cvtps2uqqv8di_mask_round = 2187,
  CODE_FOR_avx512dq_cvtps2uqqv4di_mask = 2189,
#define CODE_FOR_avx512dq_cvtps2uqqv4di_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_cvtps2uqqv2di_mask = 2191,
  CODE_FOR_fix_truncv16sfv16si2 = 2192,
  CODE_FOR_fix_truncv16sfv16si2_round = 2193,
  CODE_FOR_fix_truncv16sfv16si2_mask = 2194,
  CODE_FOR_fix_truncv16sfv16si2_mask_round = 2195,
  CODE_FOR_ufix_truncv16sfv16si2 = 2196,
  CODE_FOR_ufix_truncv16sfv16si2_round = 2197,
  CODE_FOR_ufix_truncv16sfv16si2_mask = 2198,
  CODE_FOR_ufix_truncv16sfv16si2_mask_round = 2199,
  CODE_FOR_fix_truncv8sfv8si2 = 2200,
  CODE_FOR_fix_truncv8sfv8si2_mask = 2201,
  CODE_FOR_fix_truncv4sfv4si2 = 2202,
  CODE_FOR_fix_truncv4sfv4si2_mask = 2203,
  CODE_FOR_sse2_cvtpi2pd = 2204,
  CODE_FOR_sse2_cvtpd2pi = 2205,
  CODE_FOR_sse2_cvttpd2pi = 2206,
  CODE_FOR_sse2_cvtsi2sd = 2207,
  CODE_FOR_sse2_cvtsi2sdq = 2208,
  CODE_FOR_sse2_cvtsi2sdq_round = 2209,
  CODE_FOR_avx512f_vcvtss2usi = 2210,
  CODE_FOR_avx512f_vcvtss2usi_round = 2211,
  CODE_FOR_avx512f_vcvtss2usiq = 2212,
  CODE_FOR_avx512f_vcvtss2usiq_round = 2213,
  CODE_FOR_avx512f_vcvttss2usi = 2214,
  CODE_FOR_avx512f_vcvttss2usi_round = 2215,
  CODE_FOR_avx512f_vcvttss2usiq = 2216,
  CODE_FOR_avx512f_vcvttss2usiq_round = 2217,
  CODE_FOR_avx512f_vcvtsd2usi = 2218,
  CODE_FOR_avx512f_vcvtsd2usi_round = 2219,
  CODE_FOR_avx512f_vcvtsd2usiq = 2220,
  CODE_FOR_avx512f_vcvtsd2usiq_round = 2221,
  CODE_FOR_avx512f_vcvttsd2usi = 2222,
  CODE_FOR_avx512f_vcvttsd2usi_round = 2223,
  CODE_FOR_avx512f_vcvttsd2usiq = 2224,
  CODE_FOR_avx512f_vcvttsd2usiq_round = 2225,
  CODE_FOR_sse2_cvtsd2si = 2226,
  CODE_FOR_sse2_cvtsd2si_round = 2227,
  CODE_FOR_sse2_cvtsd2si_2 = 2228,
  CODE_FOR_sse2_cvtsd2siq = 2229,
  CODE_FOR_sse2_cvtsd2siq_round = 2230,
  CODE_FOR_sse2_cvtsd2siq_2 = 2231,
  CODE_FOR_sse2_cvttsd2si = 2232,
  CODE_FOR_sse2_cvttsd2si_round = 2233,
  CODE_FOR_sse2_cvttsd2siq = 2234,
  CODE_FOR_sse2_cvttsd2siq_round = 2235,
  CODE_FOR_floatv8siv8df2 = 2236,
  CODE_FOR_floatv8siv8df2_mask = 2237,
  CODE_FOR_floatv4siv4df2 = 2238,
  CODE_FOR_floatv4siv4df2_mask = 2239,
  CODE_FOR_floatv8div8df2 = 2240,
  CODE_FOR_floatv8div8df2_round = 2241,
  CODE_FOR_floatv8div8df2_mask = 2242,
  CODE_FOR_floatv8div8df2_mask_round = 2243,
  CODE_FOR_ufloatv8div8df2 = 2244,
  CODE_FOR_ufloatv8div8df2_round = 2245,
  CODE_FOR_ufloatv8div8df2_mask = 2246,
  CODE_FOR_ufloatv8div8df2_mask_round = 2247,
  CODE_FOR_floatv4div4df2 = 2248,
  CODE_FOR_floatv4div4df2_round = 2249,
  CODE_FOR_floatv4div4df2_mask = 2250,
  CODE_FOR_floatv4div4df2_mask_round = 2251,
  CODE_FOR_ufloatv4div4df2 = 2252,
  CODE_FOR_ufloatv4div4df2_round = 2253,
  CODE_FOR_ufloatv4div4df2_mask = 2254,
  CODE_FOR_ufloatv4div4df2_mask_round = 2255,
  CODE_FOR_floatv2div2df2 = 2256,
  CODE_FOR_floatv2div2df2_round = 2257,
  CODE_FOR_floatv2div2df2_mask = 2258,
  CODE_FOR_floatv2div2df2_mask_round = 2259,
  CODE_FOR_ufloatv2div2df2 = 2260,
  CODE_FOR_ufloatv2div2df2_round = 2261,
  CODE_FOR_ufloatv2div2df2_mask = 2262,
  CODE_FOR_ufloatv2div2df2_mask_round = 2263,
  CODE_FOR_floatv8div8sf2 = 2264,
  CODE_FOR_floatv8div8sf2_round = 2265,
  CODE_FOR_floatv8div8sf2_mask = 2266,
  CODE_FOR_floatv8div8sf2_mask_round = 2267,
  CODE_FOR_ufloatv8div8sf2 = 2268,
  CODE_FOR_ufloatv8div8sf2_round = 2269,
  CODE_FOR_ufloatv8div8sf2_mask = 2270,
  CODE_FOR_ufloatv8div8sf2_mask_round = 2271,
  CODE_FOR_floatv4div4sf2 = 2272,
#define CODE_FOR_floatv4div4sf2_round CODE_FOR_nothing
  CODE_FOR_floatv4div4sf2_mask = 2273,
#define CODE_FOR_floatv4div4sf2_mask_round CODE_FOR_nothing
  CODE_FOR_ufloatv4div4sf2 = 2274,
#define CODE_FOR_ufloatv4div4sf2_round CODE_FOR_nothing
  CODE_FOR_ufloatv4div4sf2_mask = 2275,
#define CODE_FOR_ufloatv4div4sf2_mask_round CODE_FOR_nothing
  CODE_FOR_floatv2div2sf2_mask = 2278,
  CODE_FOR_ufloatv2div2sf2_mask = 2279,
  CODE_FOR_ufloatv8siv8df2 = 2280,
  CODE_FOR_ufloatv8siv8df2_mask = 2281,
  CODE_FOR_ufloatv4siv4df2 = 2282,
  CODE_FOR_ufloatv4siv4df2_mask = 2283,
  CODE_FOR_ufloatv2siv2df2 = 2284,
  CODE_FOR_ufloatv2siv2df2_mask = 2285,
  CODE_FOR_avx512f_cvtdq2pd512_2 = 2286,
  CODE_FOR_avx_cvtdq2pd256_2 = 2287,
  CODE_FOR_sse2_cvtdq2pd = 2288,
  CODE_FOR_sse2_cvtdq2pd_mask = 2289,
  CODE_FOR_avx512f_cvtpd2dq512_mask = 2292,
  CODE_FOR_avx512f_cvtpd2dq512_mask_round = 2293,
  CODE_FOR_avx_cvtpd2dq256 = 2294,
  CODE_FOR_avx_cvtpd2dq256_mask = 2295,
  CODE_FOR_sse2_cvtpd2dq = 2297,
  CODE_FOR_sse2_cvtpd2dq_mask = 2298,
  CODE_FOR_ufix_notruncv8dfv8si2 = 2299,
  CODE_FOR_ufix_notruncv8dfv8si2_round = 2300,
  CODE_FOR_ufix_notruncv8dfv8si2_mask = 2301,
  CODE_FOR_ufix_notruncv8dfv8si2_mask_round = 2302,
  CODE_FOR_ufix_notruncv4dfv4si2 = 2303,
  CODE_FOR_ufix_notruncv4dfv4si2_round = 2304,
  CODE_FOR_ufix_notruncv4dfv4si2_mask = 2305,
  CODE_FOR_ufix_notruncv4dfv4si2_mask_round = 2306,
  CODE_FOR_ufix_notruncv2dfv2si2 = 2307,
  CODE_FOR_ufix_notruncv2dfv2si2_mask = 2308,
  CODE_FOR_fix_truncv8dfv8si2 = 2309,
  CODE_FOR_fix_truncv8dfv8si2_round = 2310,
  CODE_FOR_fix_truncv8dfv8si2_mask = 2311,
  CODE_FOR_fix_truncv8dfv8si2_mask_round = 2312,
  CODE_FOR_ufix_truncv8dfv8si2 = 2313,
  CODE_FOR_ufix_truncv8dfv8si2_round = 2314,
  CODE_FOR_ufix_truncv8dfv8si2_mask = 2315,
  CODE_FOR_ufix_truncv8dfv8si2_mask_round = 2316,
  CODE_FOR_ufix_truncv2dfv2si2 = 2317,
  CODE_FOR_ufix_truncv2dfv2si2_mask = 2318,
  CODE_FOR_fix_truncv4dfv4si2 = 2319,
  CODE_FOR_fix_truncv4dfv4si2_mask = 2320,
  CODE_FOR_ufix_truncv4dfv4si2 = 2321,
  CODE_FOR_ufix_truncv4dfv4si2_mask = 2322,
  CODE_FOR_fix_truncv8dfv8di2 = 2323,
  CODE_FOR_fix_truncv8dfv8di2_round = 2324,
  CODE_FOR_fix_truncv8dfv8di2_mask = 2325,
  CODE_FOR_fix_truncv8dfv8di2_mask_round = 2326,
  CODE_FOR_ufix_truncv8dfv8di2 = 2327,
  CODE_FOR_ufix_truncv8dfv8di2_round = 2328,
  CODE_FOR_ufix_truncv8dfv8di2_mask = 2329,
  CODE_FOR_ufix_truncv8dfv8di2_mask_round = 2330,
  CODE_FOR_fix_truncv4dfv4di2 = 2331,
#define CODE_FOR_fix_truncv4dfv4di2_round CODE_FOR_nothing
  CODE_FOR_fix_truncv4dfv4di2_mask = 2332,
#define CODE_FOR_fix_truncv4dfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv4dfv4di2 = 2333,
#define CODE_FOR_ufix_truncv4dfv4di2_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv4dfv4di2_mask = 2334,
#define CODE_FOR_ufix_truncv4dfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_truncv2dfv2di2 = 2335,
#define CODE_FOR_fix_truncv2dfv2di2_round CODE_FOR_nothing
  CODE_FOR_fix_truncv2dfv2di2_mask = 2336,
#define CODE_FOR_fix_truncv2dfv2di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv2dfv2di2 = 2337,
#define CODE_FOR_ufix_truncv2dfv2di2_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv2dfv2di2_mask = 2338,
#define CODE_FOR_ufix_truncv2dfv2di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_notruncv8dfv8di2 = 2339,
  CODE_FOR_fix_notruncv8dfv8di2_round = 2340,
  CODE_FOR_fix_notruncv8dfv8di2_mask = 2341,
  CODE_FOR_fix_notruncv8dfv8di2_mask_round = 2342,
  CODE_FOR_fix_notruncv4dfv4di2 = 2343,
#define CODE_FOR_fix_notruncv4dfv4di2_round CODE_FOR_nothing
  CODE_FOR_fix_notruncv4dfv4di2_mask = 2344,
#define CODE_FOR_fix_notruncv4dfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_notruncv2dfv2di2 = 2345,
#define CODE_FOR_fix_notruncv2dfv2di2_round CODE_FOR_nothing
  CODE_FOR_fix_notruncv2dfv2di2_mask = 2346,
#define CODE_FOR_fix_notruncv2dfv2di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_notruncv8dfv8di2 = 2347,
  CODE_FOR_ufix_notruncv8dfv8di2_round = 2348,
  CODE_FOR_ufix_notruncv8dfv8di2_mask = 2349,
  CODE_FOR_ufix_notruncv8dfv8di2_mask_round = 2350,
  CODE_FOR_ufix_notruncv4dfv4di2 = 2351,
#define CODE_FOR_ufix_notruncv4dfv4di2_round CODE_FOR_nothing
  CODE_FOR_ufix_notruncv4dfv4di2_mask = 2352,
#define CODE_FOR_ufix_notruncv4dfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_notruncv2dfv2di2 = 2353,
#define CODE_FOR_ufix_notruncv2dfv2di2_round CODE_FOR_nothing
  CODE_FOR_ufix_notruncv2dfv2di2_mask = 2354,
#define CODE_FOR_ufix_notruncv2dfv2di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_truncv8sfv8di2 = 2355,
  CODE_FOR_fix_truncv8sfv8di2_round = 2356,
  CODE_FOR_fix_truncv8sfv8di2_mask = 2357,
  CODE_FOR_fix_truncv8sfv8di2_mask_round = 2358,
  CODE_FOR_ufix_truncv8sfv8di2 = 2359,
  CODE_FOR_ufix_truncv8sfv8di2_round = 2360,
  CODE_FOR_ufix_truncv8sfv8di2_mask = 2361,
  CODE_FOR_ufix_truncv8sfv8di2_mask_round = 2362,
  CODE_FOR_fix_truncv4sfv4di2 = 2363,
#define CODE_FOR_fix_truncv4sfv4di2_round CODE_FOR_nothing
  CODE_FOR_fix_truncv4sfv4di2_mask = 2364,
#define CODE_FOR_fix_truncv4sfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv4sfv4di2 = 2365,
#define CODE_FOR_ufix_truncv4sfv4di2_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv4sfv4di2_mask = 2366,
#define CODE_FOR_ufix_truncv4sfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_truncv2sfv2di2 = 2367,
  CODE_FOR_fix_truncv2sfv2di2_mask = 2368,
  CODE_FOR_ufix_truncv2sfv2di2 = 2369,
  CODE_FOR_ufix_truncv2sfv2di2_mask = 2370,
  CODE_FOR_ufix_truncv8sfv8si2 = 2371,
  CODE_FOR_ufix_truncv8sfv8si2_mask = 2372,
  CODE_FOR_ufix_truncv4sfv4si2 = 2373,
  CODE_FOR_ufix_truncv4sfv4si2_mask = 2374,
  CODE_FOR_sse2_cvttpd2dq = 2375,
  CODE_FOR_sse2_cvttpd2dq_mask = 2376,
  CODE_FOR_sse2_cvtsd2ss = 2377,
  CODE_FOR_sse2_cvtsd2ss_round = 2378,
  CODE_FOR_sse2_cvtss2sd = 2379,
  CODE_FOR_sse2_cvtss2sd_round = 2380,
  CODE_FOR_avx512f_cvtpd2ps512_mask = 2383,
  CODE_FOR_avx512f_cvtpd2ps512_mask_round = 2384,
  CODE_FOR_avx_cvtpd2ps256 = 2385,
  CODE_FOR_avx_cvtpd2ps256_mask = 2386,
  CODE_FOR_avx512f_cvtps2pd512 = 2389,
  CODE_FOR_avx512f_cvtps2pd512_round = 2390,
  CODE_FOR_avx512f_cvtps2pd512_mask = 2391,
  CODE_FOR_avx512f_cvtps2pd512_mask_round = 2392,
  CODE_FOR_avx_cvtps2pd256 = 2393,
#define CODE_FOR_avx_cvtps2pd256_round CODE_FOR_nothing
  CODE_FOR_avx_cvtps2pd256_mask = 2394,
#define CODE_FOR_avx_cvtps2pd256_mask_round CODE_FOR_nothing
  CODE_FOR_vec_unpacks_lo_v16sf = 2396,
  CODE_FOR_avx512bw_cvtb2maskv64qi = 2397,
  CODE_FOR_avx512vl_cvtb2maskv16qi = 2398,
  CODE_FOR_avx512vl_cvtb2maskv32qi = 2399,
  CODE_FOR_avx512bw_cvtw2maskv32hi = 2400,
  CODE_FOR_avx512vl_cvtw2maskv16hi = 2401,
  CODE_FOR_avx512vl_cvtw2maskv8hi = 2402,
  CODE_FOR_avx512f_cvtd2maskv16si = 2403,
  CODE_FOR_avx512vl_cvtd2maskv8si = 2404,
  CODE_FOR_avx512vl_cvtd2maskv4si = 2405,
  CODE_FOR_avx512f_cvtq2maskv8di = 2406,
  CODE_FOR_avx512vl_cvtq2maskv4di = 2407,
  CODE_FOR_avx512vl_cvtq2maskv2di = 2408,
  CODE_FOR_sse2_cvtps2pd = 2421,
  CODE_FOR_sse2_cvtps2pd_mask = 2422,
  CODE_FOR_sse_movhlps = 2423,
  CODE_FOR_sse_movlhps = 2424,
  CODE_FOR_avx512f_unpckhps512_mask = 2426,
  CODE_FOR_avx_unpckhps256 = 2427,
  CODE_FOR_avx_unpckhps256_mask = 2428,
  CODE_FOR_vec_interleave_highv4sf = 2429,
  CODE_FOR_vec_interleave_highv4sf_mask = 2430,
  CODE_FOR_avx512f_unpcklps512_mask = 2432,
  CODE_FOR_avx_unpcklps256 = 2433,
  CODE_FOR_avx_unpcklps256_mask = 2434,
  CODE_FOR_unpcklps128_mask = 2435,
  CODE_FOR_vec_interleave_lowv4sf = 2436,
  CODE_FOR_avx_movshdup256 = 2437,
  CODE_FOR_avx_movshdup256_mask = 2438,
  CODE_FOR_sse3_movshdup = 2439,
  CODE_FOR_sse3_movshdup_mask = 2440,
  CODE_FOR_avx512f_movshdup512_mask = 2442,
  CODE_FOR_avx_movsldup256 = 2443,
  CODE_FOR_avx_movsldup256_mask = 2444,
  CODE_FOR_sse3_movsldup = 2445,
  CODE_FOR_sse3_movsldup_mask = 2446,
  CODE_FOR_avx512f_movsldup512_mask = 2448,
  CODE_FOR_avx_shufps256_1 = 2449,
  CODE_FOR_avx_shufps256_1_mask = 2450,
  CODE_FOR_sse_shufps_v4sf_mask = 2451,
  CODE_FOR_sse_shufps_v4si = 2452,
  CODE_FOR_sse_shufps_v4sf = 2453,
  CODE_FOR_sse_storehps = 2454,
  CODE_FOR_sse_loadhps = 2455,
  CODE_FOR_sse_storelps = 2456,
  CODE_FOR_sse_loadlps = 2457,
  CODE_FOR_sse_movss = 2458,
  CODE_FOR_avx2_vec_dupv8sf = 2459,
  CODE_FOR_avx2_vec_dupv4sf = 2460,
  CODE_FOR_avx2_vec_dupv8sf_1 = 2461,
  CODE_FOR_avx512f_vec_dupv16sf_1 = 2462,
  CODE_FOR_avx512f_vec_dupv8df_1 = 2463,
  CODE_FOR_vec_setv4si_0 = 2467,
  CODE_FOR_vec_setv4sf_0 = 2468,
  CODE_FOR_sse4_1_insertps = 2470,
  CODE_FOR_avx512dq_vextractf64x2_1_maskm = 2474,
  CODE_FOR_avx512dq_vextracti64x2_1_maskm = 2475,
  CODE_FOR_avx512f_vextractf32x4_1_maskm = 2476,
  CODE_FOR_avx512f_vextracti32x4_1_maskm = 2477,
  CODE_FOR_avx512dq_vextractf64x2_1_mask = 2479,
  CODE_FOR_avx512dq_vextracti64x2_1_mask = 2481,
  CODE_FOR_avx512f_vextractf32x4_1_mask = 2483,
  CODE_FOR_avx512f_vextracti32x4_1_mask = 2485,
  CODE_FOR_vec_extract_lo_v8df_maskm = 2486,
  CODE_FOR_vec_extract_lo_v8di_maskm = 2487,
  CODE_FOR_vec_extract_lo_v8df = 2488,
  CODE_FOR_vec_extract_lo_v8df_mask = 2489,
  CODE_FOR_vec_extract_lo_v8di = 2490,
  CODE_FOR_vec_extract_lo_v8di_mask = 2491,
  CODE_FOR_vec_extract_hi_v8df_maskm = 2492,
  CODE_FOR_vec_extract_hi_v8di_maskm = 2493,
  CODE_FOR_vec_extract_hi_v8df = 2494,
  CODE_FOR_vec_extract_hi_v8df_mask = 2495,
  CODE_FOR_vec_extract_hi_v8di = 2496,
  CODE_FOR_vec_extract_hi_v8di_mask = 2497,
  CODE_FOR_vec_extract_hi_v16sf_maskm = 2498,
  CODE_FOR_vec_extract_hi_v16si_maskm = 2499,
  CODE_FOR_vec_extract_hi_v16sf = 2500,
  CODE_FOR_vec_extract_hi_v16sf_mask = 2501,
  CODE_FOR_vec_extract_hi_v16si = 2502,
  CODE_FOR_vec_extract_hi_v16si_mask = 2503,
  CODE_FOR_vec_extract_lo_v16sf = 2504,
  CODE_FOR_vec_extract_lo_v16sf_mask = 2505,
  CODE_FOR_vec_extract_lo_v16si = 2506,
  CODE_FOR_vec_extract_lo_v16si_mask = 2507,
  CODE_FOR_vec_extract_lo_v4di = 2508,
  CODE_FOR_vec_extract_lo_v4di_mask = 2509,
  CODE_FOR_vec_extract_lo_v4df = 2510,
  CODE_FOR_vec_extract_lo_v4df_mask = 2511,
  CODE_FOR_vec_extract_hi_v4di = 2512,
  CODE_FOR_vec_extract_hi_v4di_mask = 2513,
  CODE_FOR_vec_extract_hi_v4df = 2514,
  CODE_FOR_vec_extract_hi_v4df_mask = 2515,
  CODE_FOR_vec_extract_lo_v8si = 2516,
  CODE_FOR_vec_extract_lo_v8si_mask = 2517,
  CODE_FOR_vec_extract_lo_v8sf = 2518,
  CODE_FOR_vec_extract_lo_v8sf_mask = 2519,
  CODE_FOR_vec_extract_lo_v8si_maskm = 2520,
  CODE_FOR_vec_extract_lo_v8sf_maskm = 2521,
  CODE_FOR_vec_extract_hi_v8si_maskm = 2522,
  CODE_FOR_vec_extract_hi_v8sf_maskm = 2523,
  CODE_FOR_vec_extract_hi_v8si = 2524,
  CODE_FOR_vec_extract_hi_v8si_mask = 2525,
  CODE_FOR_vec_extract_hi_v8sf = 2526,
  CODE_FOR_vec_extract_hi_v8sf_mask = 2527,
  CODE_FOR_vec_extract_lo_v32hi = 2528,
  CODE_FOR_vec_extract_hi_v32hi = 2529,
  CODE_FOR_vec_extract_lo_v16hi = 2530,
  CODE_FOR_vec_extract_hi_v16hi = 2531,
  CODE_FOR_vec_extract_lo_v64qi = 2532,
  CODE_FOR_vec_extract_hi_v64qi = 2533,
  CODE_FOR_vec_extract_lo_v32qi = 2534,
  CODE_FOR_vec_extract_hi_v32qi = 2535,
  CODE_FOR_avx512f_unpckhpd512_mask = 2537,
  CODE_FOR_avx_unpckhpd256 = 2538,
  CODE_FOR_avx_unpckhpd256_mask = 2539,
  CODE_FOR_avx512vl_unpckhpd128_mask = 2540,
  CODE_FOR_avx512vl_unpcklpd128_mask = 2546,
  CODE_FOR_avx512f_vmscalefv4sf = 2548,
  CODE_FOR_avx512f_vmscalefv4sf_round = 2549,
  CODE_FOR_avx512f_vmscalefv2df = 2550,
  CODE_FOR_avx512f_vmscalefv2df_round = 2551,
  CODE_FOR_avx512f_scalefv16sf = 2552,
  CODE_FOR_avx512f_scalefv16sf_round = 2553,
  CODE_FOR_avx512f_scalefv16sf_mask = 2554,
  CODE_FOR_avx512f_scalefv16sf_mask_round = 2555,
  CODE_FOR_avx512vl_scalefv8sf = 2556,
  CODE_FOR_avx512vl_scalefv8sf_round = 2557,
  CODE_FOR_avx512vl_scalefv8sf_mask = 2558,
  CODE_FOR_avx512vl_scalefv8sf_mask_round = 2559,
  CODE_FOR_avx512vl_scalefv4sf = 2560,
  CODE_FOR_avx512vl_scalefv4sf_round = 2561,
  CODE_FOR_avx512vl_scalefv4sf_mask = 2562,
  CODE_FOR_avx512vl_scalefv4sf_mask_round = 2563,
  CODE_FOR_avx512f_scalefv8df = 2564,
  CODE_FOR_avx512f_scalefv8df_round = 2565,
  CODE_FOR_avx512f_scalefv8df_mask = 2566,
  CODE_FOR_avx512f_scalefv8df_mask_round = 2567,
  CODE_FOR_avx512vl_scalefv4df = 2568,
  CODE_FOR_avx512vl_scalefv4df_round = 2569,
  CODE_FOR_avx512vl_scalefv4df_mask = 2570,
  CODE_FOR_avx512vl_scalefv4df_mask_round = 2571,
  CODE_FOR_avx512vl_scalefv2df = 2572,
  CODE_FOR_avx512vl_scalefv2df_round = 2573,
  CODE_FOR_avx512vl_scalefv2df_mask = 2574,
  CODE_FOR_avx512vl_scalefv2df_mask_round = 2575,
  CODE_FOR_avx512f_vternlogv16si = 2576,
  CODE_FOR_avx512f_vternlogv16si_maskz_1 = 2577,
  CODE_FOR_avx512vl_vternlogv8si = 2578,
  CODE_FOR_avx512vl_vternlogv8si_maskz_1 = 2579,
  CODE_FOR_avx512vl_vternlogv4si = 2580,
  CODE_FOR_avx512vl_vternlogv4si_maskz_1 = 2581,
  CODE_FOR_avx512f_vternlogv8di = 2582,
  CODE_FOR_avx512f_vternlogv8di_maskz_1 = 2583,
  CODE_FOR_avx512vl_vternlogv4di = 2584,
  CODE_FOR_avx512vl_vternlogv4di_maskz_1 = 2585,
  CODE_FOR_avx512vl_vternlogv2di = 2586,
  CODE_FOR_avx512vl_vternlogv2di_maskz_1 = 2587,
  CODE_FOR_avx512f_vternlogv16si_mask = 2588,
  CODE_FOR_avx512vl_vternlogv8si_mask = 2589,
  CODE_FOR_avx512vl_vternlogv4si_mask = 2590,
  CODE_FOR_avx512f_vternlogv8di_mask = 2591,
  CODE_FOR_avx512vl_vternlogv4di_mask = 2592,
  CODE_FOR_avx512vl_vternlogv2di_mask = 2593,
  CODE_FOR_avx512f_getexpv16sf = 2594,
  CODE_FOR_avx512f_getexpv16sf_round = 2595,
  CODE_FOR_avx512f_getexpv16sf_mask = 2596,
  CODE_FOR_avx512f_getexpv16sf_mask_round = 2597,
  CODE_FOR_avx512vl_getexpv8sf = 2598,
  CODE_FOR_avx512vl_getexpv8sf_round = 2599,
  CODE_FOR_avx512vl_getexpv8sf_mask = 2600,
  CODE_FOR_avx512vl_getexpv8sf_mask_round = 2601,
  CODE_FOR_avx512vl_getexpv4sf = 2602,
  CODE_FOR_avx512vl_getexpv4sf_round = 2603,
  CODE_FOR_avx512vl_getexpv4sf_mask = 2604,
  CODE_FOR_avx512vl_getexpv4sf_mask_round = 2605,
  CODE_FOR_avx512f_getexpv8df = 2606,
  CODE_FOR_avx512f_getexpv8df_round = 2607,
  CODE_FOR_avx512f_getexpv8df_mask = 2608,
  CODE_FOR_avx512f_getexpv8df_mask_round = 2609,
  CODE_FOR_avx512vl_getexpv4df = 2610,
  CODE_FOR_avx512vl_getexpv4df_round = 2611,
  CODE_FOR_avx512vl_getexpv4df_mask = 2612,
  CODE_FOR_avx512vl_getexpv4df_mask_round = 2613,
  CODE_FOR_avx512vl_getexpv2df = 2614,
  CODE_FOR_avx512vl_getexpv2df_round = 2615,
  CODE_FOR_avx512vl_getexpv2df_mask = 2616,
  CODE_FOR_avx512vl_getexpv2df_mask_round = 2617,
  CODE_FOR_avx512f_sgetexpv4sf = 2618,
  CODE_FOR_avx512f_sgetexpv4sf_round = 2619,
  CODE_FOR_avx512f_sgetexpv2df = 2620,
  CODE_FOR_avx512f_sgetexpv2df_round = 2621,
  CODE_FOR_avx512f_alignv16si_mask = 2623,
  CODE_FOR_avx512vl_alignv8si_mask = 2625,
  CODE_FOR_avx512vl_alignv4si_mask = 2627,
  CODE_FOR_avx512f_alignv8di_mask = 2629,
  CODE_FOR_avx512vl_alignv4di_mask = 2631,
  CODE_FOR_avx512vl_alignv2di_mask = 2633,
  CODE_FOR_avx512f_fixupimmv16sf = 2634,
  CODE_FOR_avx512f_fixupimmv16sf_round = 2635,
  CODE_FOR_avx512f_fixupimmv16sf_maskz_1 = 2636,
  CODE_FOR_avx512f_fixupimmv16sf_maskz_1_round = 2637,
  CODE_FOR_avx512vl_fixupimmv8sf = 2638,
  CODE_FOR_avx512vl_fixupimmv8sf_round = 2639,
  CODE_FOR_avx512vl_fixupimmv8sf_maskz_1 = 2640,
  CODE_FOR_avx512vl_fixupimmv8sf_maskz_1_round = 2641,
  CODE_FOR_avx512vl_fixupimmv4sf = 2642,
  CODE_FOR_avx512vl_fixupimmv4sf_round = 2643,
  CODE_FOR_avx512vl_fixupimmv4sf_maskz_1 = 2644,
  CODE_FOR_avx512vl_fixupimmv4sf_maskz_1_round = 2645,
  CODE_FOR_avx512f_fixupimmv8df = 2646,
  CODE_FOR_avx512f_fixupimmv8df_round = 2647,
  CODE_FOR_avx512f_fixupimmv8df_maskz_1 = 2648,
  CODE_FOR_avx512f_fixupimmv8df_maskz_1_round = 2649,
  CODE_FOR_avx512vl_fixupimmv4df = 2650,
  CODE_FOR_avx512vl_fixupimmv4df_round = 2651,
  CODE_FOR_avx512vl_fixupimmv4df_maskz_1 = 2652,
  CODE_FOR_avx512vl_fixupimmv4df_maskz_1_round = 2653,
  CODE_FOR_avx512vl_fixupimmv2df = 2654,
  CODE_FOR_avx512vl_fixupimmv2df_round = 2655,
  CODE_FOR_avx512vl_fixupimmv2df_maskz_1 = 2656,
  CODE_FOR_avx512vl_fixupimmv2df_maskz_1_round = 2657,
  CODE_FOR_avx512f_fixupimmv16sf_mask = 2658,
  CODE_FOR_avx512f_fixupimmv16sf_mask_round = 2659,
  CODE_FOR_avx512vl_fixupimmv8sf_mask = 2660,
  CODE_FOR_avx512vl_fixupimmv8sf_mask_round = 2661,
  CODE_FOR_avx512vl_fixupimmv4sf_mask = 2662,
  CODE_FOR_avx512vl_fixupimmv4sf_mask_round = 2663,
  CODE_FOR_avx512f_fixupimmv8df_mask = 2664,
  CODE_FOR_avx512f_fixupimmv8df_mask_round = 2665,
  CODE_FOR_avx512vl_fixupimmv4df_mask = 2666,
  CODE_FOR_avx512vl_fixupimmv4df_mask_round = 2667,
  CODE_FOR_avx512vl_fixupimmv2df_mask = 2668,
  CODE_FOR_avx512vl_fixupimmv2df_mask_round = 2669,
  CODE_FOR_avx512f_sfixupimmv4sf = 2670,
  CODE_FOR_avx512f_sfixupimmv4sf_round = 2671,
  CODE_FOR_avx512f_sfixupimmv4sf_maskz_1 = 2672,
  CODE_FOR_avx512f_sfixupimmv4sf_maskz_1_round = 2673,
  CODE_FOR_avx512f_sfixupimmv2df = 2674,
  CODE_FOR_avx512f_sfixupimmv2df_round = 2675,
  CODE_FOR_avx512f_sfixupimmv2df_maskz_1 = 2676,
  CODE_FOR_avx512f_sfixupimmv2df_maskz_1_round = 2677,
  CODE_FOR_avx512f_sfixupimmv4sf_mask = 2678,
  CODE_FOR_avx512f_sfixupimmv4sf_mask_round = 2679,
  CODE_FOR_avx512f_sfixupimmv2df_mask = 2680,
  CODE_FOR_avx512f_sfixupimmv2df_mask_round = 2681,
  CODE_FOR_avx512f_rndscalev16sf = 2682,
  CODE_FOR_avx512f_rndscalev16sf_round = 2683,
  CODE_FOR_avx512f_rndscalev16sf_mask = 2684,
  CODE_FOR_avx512f_rndscalev16sf_mask_round = 2685,
  CODE_FOR_avx512vl_rndscalev8sf = 2686,
  CODE_FOR_avx512vl_rndscalev8sf_round = 2687,
  CODE_FOR_avx512vl_rndscalev8sf_mask = 2688,
  CODE_FOR_avx512vl_rndscalev8sf_mask_round = 2689,
  CODE_FOR_avx512vl_rndscalev4sf = 2690,
  CODE_FOR_avx512vl_rndscalev4sf_round = 2691,
  CODE_FOR_avx512vl_rndscalev4sf_mask = 2692,
  CODE_FOR_avx512vl_rndscalev4sf_mask_round = 2693,
  CODE_FOR_avx512f_rndscalev8df = 2694,
  CODE_FOR_avx512f_rndscalev8df_round = 2695,
  CODE_FOR_avx512f_rndscalev8df_mask = 2696,
  CODE_FOR_avx512f_rndscalev8df_mask_round = 2697,
  CODE_FOR_avx512vl_rndscalev4df = 2698,
  CODE_FOR_avx512vl_rndscalev4df_round = 2699,
  CODE_FOR_avx512vl_rndscalev4df_mask = 2700,
  CODE_FOR_avx512vl_rndscalev4df_mask_round = 2701,
  CODE_FOR_avx512vl_rndscalev2df = 2702,
  CODE_FOR_avx512vl_rndscalev2df_round = 2703,
  CODE_FOR_avx512vl_rndscalev2df_mask = 2704,
  CODE_FOR_avx512vl_rndscalev2df_mask_round = 2705,
  CODE_FOR_avx512f_rndscalev4sf = 2706,
  CODE_FOR_avx512f_rndscalev4sf_round = 2707,
  CODE_FOR_avx512f_rndscalev2df = 2708,
  CODE_FOR_avx512f_rndscalev2df_round = 2709,
  CODE_FOR_avx512f_shufps512_1 = 2710,
  CODE_FOR_avx512f_shufps512_1_mask = 2711,
  CODE_FOR_avx512f_shufpd512_1 = 2712,
  CODE_FOR_avx512f_shufpd512_1_mask = 2713,
  CODE_FOR_avx_shufpd256_1 = 2714,
  CODE_FOR_avx_shufpd256_1_mask = 2715,
  CODE_FOR_sse2_shufpd_v2df_mask = 2716,
  CODE_FOR_avx2_interleave_highv4di = 2717,
  CODE_FOR_avx2_interleave_highv4di_mask = 2718,
  CODE_FOR_avx512f_interleave_highv8di_mask = 2720,
  CODE_FOR_vec_interleave_highv2di = 2721,
  CODE_FOR_vec_interleave_highv2di_mask = 2722,
  CODE_FOR_avx2_interleave_lowv4di = 2723,
  CODE_FOR_avx2_interleave_lowv4di_mask = 2724,
  CODE_FOR_avx512f_interleave_lowv8di_mask = 2726,
  CODE_FOR_vec_interleave_lowv2di = 2727,
  CODE_FOR_vec_interleave_lowv2di_mask = 2728,
  CODE_FOR_sse2_shufpd_v2di = 2729,
  CODE_FOR_sse2_shufpd_v2df = 2730,
  CODE_FOR_sse2_storehpd = 2731,
  CODE_FOR_sse2_storelpd = 2733,
  CODE_FOR_sse2_loadhpd = 2735,
  CODE_FOR_sse2_loadlpd = 2736,
  CODE_FOR_sse2_movsd = 2737,
  CODE_FOR_vec_dupv2df = 2738,
  CODE_FOR_vec_dupv2df_mask = 2739,
  CODE_FOR_avx512f_ss_truncatev16siv16qi2_mask = 2753,
  CODE_FOR_avx512f_truncatev16siv16qi2_mask = 2754,
  CODE_FOR_avx512f_us_truncatev16siv16qi2_mask = 2755,
  CODE_FOR_avx512f_ss_truncatev16siv16hi2_mask = 2756,
  CODE_FOR_avx512f_truncatev16siv16hi2_mask = 2757,
  CODE_FOR_avx512f_us_truncatev16siv16hi2_mask = 2758,
  CODE_FOR_avx512f_ss_truncatev8div8si2_mask = 2759,
  CODE_FOR_avx512f_truncatev8div8si2_mask = 2760,
  CODE_FOR_avx512f_us_truncatev8div8si2_mask = 2761,
  CODE_FOR_avx512f_ss_truncatev8div8hi2_mask = 2762,
  CODE_FOR_avx512f_truncatev8div8hi2_mask = 2763,
  CODE_FOR_avx512f_us_truncatev8div8hi2_mask = 2764,
  CODE_FOR_avx512bw_ss_truncatev32hiv32qi2 = 2765,
  CODE_FOR_avx512bw_truncatev32hiv32qi2 = 2766,
  CODE_FOR_avx512bw_us_truncatev32hiv32qi2 = 2767,
  CODE_FOR_avx512bw_ss_truncatev32hiv32qi2_mask = 2768,
  CODE_FOR_avx512bw_truncatev32hiv32qi2_mask = 2769,
  CODE_FOR_avx512bw_us_truncatev32hiv32qi2_mask = 2770,
  CODE_FOR_avx512vl_ss_truncatev4div4si2_mask = 2780,
  CODE_FOR_avx512vl_truncatev4div4si2_mask = 2781,
  CODE_FOR_avx512vl_us_truncatev4div4si2_mask = 2782,
  CODE_FOR_avx512vl_ss_truncatev8siv8hi2_mask = 2783,
  CODE_FOR_avx512vl_truncatev8siv8hi2_mask = 2784,
  CODE_FOR_avx512vl_us_truncatev8siv8hi2_mask = 2785,
  CODE_FOR_avx512vl_ss_truncatev16hiv16qi2_mask = 2786,
  CODE_FOR_avx512vl_truncatev16hiv16qi2_mask = 2787,
  CODE_FOR_avx512vl_us_truncatev16hiv16qi2_mask = 2788,
  CODE_FOR_avx512vl_ss_truncatev2div2qi2_mask = 2807,
  CODE_FOR_avx512vl_truncatev2div2qi2_mask = 2808,
  CODE_FOR_avx512vl_us_truncatev2div2qi2_mask = 2809,
  CODE_FOR_avx512vl_ss_truncatev2div2qi2_mask_store = 2810,
  CODE_FOR_avx512vl_truncatev2div2qi2_mask_store = 2811,
  CODE_FOR_avx512vl_us_truncatev2div2qi2_mask_store = 2812,
  CODE_FOR_avx512vl_ss_truncatev4siv4qi2_mask = 2819,
  CODE_FOR_avx512vl_truncatev4siv4qi2_mask = 2820,
  CODE_FOR_avx512vl_us_truncatev4siv4qi2_mask = 2821,
  CODE_FOR_avx512vl_ss_truncatev4div4qi2_mask = 2822,
  CODE_FOR_avx512vl_truncatev4div4qi2_mask = 2823,
  CODE_FOR_avx512vl_us_truncatev4div4qi2_mask = 2824,
  CODE_FOR_avx512vl_ss_truncatev4siv4qi2_mask_store = 2825,
  CODE_FOR_avx512vl_truncatev4siv4qi2_mask_store = 2826,
  CODE_FOR_avx512vl_us_truncatev4siv4qi2_mask_store = 2827,
  CODE_FOR_avx512vl_ss_truncatev4div4qi2_mask_store = 2828,
  CODE_FOR_avx512vl_truncatev4div4qi2_mask_store = 2829,
  CODE_FOR_avx512vl_us_truncatev4div4qi2_mask_store = 2830,
  CODE_FOR_avx512vl_ss_truncatev8hiv8qi2_mask = 2837,
  CODE_FOR_avx512vl_truncatev8hiv8qi2_mask = 2838,
  CODE_FOR_avx512vl_us_truncatev8hiv8qi2_mask = 2839,
  CODE_FOR_avx512vl_ss_truncatev8siv8qi2_mask = 2840,
  CODE_FOR_avx512vl_truncatev8siv8qi2_mask = 2841,
  CODE_FOR_avx512vl_us_truncatev8siv8qi2_mask = 2842,
  CODE_FOR_avx512vl_ss_truncatev8hiv8qi2_mask_store = 2843,
  CODE_FOR_avx512vl_truncatev8hiv8qi2_mask_store = 2844,
  CODE_FOR_avx512vl_us_truncatev8hiv8qi2_mask_store = 2845,
  CODE_FOR_avx512vl_ss_truncatev8siv8qi2_mask_store = 2846,
  CODE_FOR_avx512vl_truncatev8siv8qi2_mask_store = 2847,
  CODE_FOR_avx512vl_us_truncatev8siv8qi2_mask_store = 2848,
  CODE_FOR_avx512vl_ss_truncatev4siv4hi2_mask = 2864,
  CODE_FOR_avx512vl_truncatev4siv4hi2_mask = 2865,
  CODE_FOR_avx512vl_us_truncatev4siv4hi2_mask = 2866,
  CODE_FOR_avx512vl_ss_truncatev4div4hi2_mask = 2867,
  CODE_FOR_avx512vl_truncatev4div4hi2_mask = 2868,
  CODE_FOR_avx512vl_us_truncatev4div4hi2_mask = 2869,
  CODE_FOR_avx512vl_ss_truncatev4siv4hi2_mask_store = 2870,
  CODE_FOR_avx512vl_truncatev4siv4hi2_mask_store = 2871,
  CODE_FOR_avx512vl_us_truncatev4siv4hi2_mask_store = 2872,
  CODE_FOR_avx512vl_ss_truncatev4div4hi2_mask_store = 2873,
  CODE_FOR_avx512vl_truncatev4div4hi2_mask_store = 2874,
  CODE_FOR_avx512vl_us_truncatev4div4hi2_mask_store = 2875,
  CODE_FOR_avx512vl_ss_truncatev2div2hi2_mask = 2879,
  CODE_FOR_avx512vl_truncatev2div2hi2_mask = 2880,
  CODE_FOR_avx512vl_us_truncatev2div2hi2_mask = 2881,
  CODE_FOR_avx512vl_ss_truncatev2div2hi2_mask_store = 2882,
  CODE_FOR_avx512vl_truncatev2div2hi2_mask_store = 2883,
  CODE_FOR_avx512vl_us_truncatev2div2hi2_mask_store = 2884,
  CODE_FOR_avx512vl_ss_truncatev2div2si2_mask = 2891,
  CODE_FOR_avx512vl_truncatev2div2si2_mask = 2892,
  CODE_FOR_avx512vl_us_truncatev2div2si2_mask = 2893,
  CODE_FOR_avx512vl_ss_truncatev2div2si2_mask_store = 2894,
  CODE_FOR_avx512vl_truncatev2div2si2_mask_store = 2895,
  CODE_FOR_avx512vl_us_truncatev2div2si2_mask_store = 2896,
  CODE_FOR_avx512f_ss_truncatev8div16qi2_mask = 2903,
  CODE_FOR_avx512f_truncatev8div16qi2_mask = 2904,
  CODE_FOR_avx512f_us_truncatev8div16qi2_mask = 2905,
  CODE_FOR_avx512f_ss_truncatev8div16qi2_mask_store = 2906,
  CODE_FOR_avx512f_truncatev8div16qi2_mask_store = 2907,
  CODE_FOR_avx512f_us_truncatev8div16qi2_mask_store = 2908,
  CODE_FOR_avx512bw_pmaddwd512v32hi = 3059,
  CODE_FOR_avx512bw_pmaddwd512v32hi_mask = 3060,
  CODE_FOR_avx512bw_pmaddwd512v16hi = 3061,
  CODE_FOR_avx512bw_pmaddwd512v16hi_mask = 3062,
  CODE_FOR_avx512bw_pmaddwd512v8hi = 3063,
  CODE_FOR_avx512bw_pmaddwd512v8hi_mask = 3064,
  CODE_FOR_avx512dq_mulv8di3 = 3067,
  CODE_FOR_avx512dq_mulv8di3_mask = 3068,
  CODE_FOR_avx512dq_mulv4di3 = 3069,
  CODE_FOR_avx512dq_mulv4di3_mask = 3070,
  CODE_FOR_avx512dq_mulv2di3 = 3071,
  CODE_FOR_avx512dq_mulv2di3_mask = 3072,
  CODE_FOR_ashrv16hi3 = 3079,
  CODE_FOR_ashrv8hi3 = 3080,
  CODE_FOR_ashrv8si3 = 3081,
  CODE_FOR_ashrv4si3 = 3082,
  CODE_FOR_ashrv16hi3_mask = 3084,
  CODE_FOR_ashrv8hi3_mask = 3086,
  CODE_FOR_ashrv8si3_mask = 3088,
  CODE_FOR_ashrv4si3_mask = 3090,
  CODE_FOR_ashrv2di3_mask = 3092,
  CODE_FOR_ashrv32hi3 = 3093,
  CODE_FOR_ashrv32hi3_mask = 3094,
  CODE_FOR_ashrv4di3 = 3095,
  CODE_FOR_ashrv4di3_mask = 3096,
  CODE_FOR_ashrv16si3 = 3097,
  CODE_FOR_ashrv16si3_mask = 3098,
  CODE_FOR_ashrv8di3 = 3099,
  CODE_FOR_ashrv8di3_mask = 3100,
  CODE_FOR_ashlv32hi3 = 3101,
  CODE_FOR_ashlv32hi3_mask = 3102,
  CODE_FOR_lshrv32hi3 = 3103,
  CODE_FOR_lshrv32hi3_mask = 3104,
  CODE_FOR_ashlv16hi3 = 3105,
  CODE_FOR_ashlv16hi3_mask = 3106,
  CODE_FOR_lshrv16hi3 = 3107,
  CODE_FOR_lshrv16hi3_mask = 3108,
  CODE_FOR_ashlv8hi3 = 3109,
  CODE_FOR_ashlv8hi3_mask = 3110,
  CODE_FOR_lshrv8hi3 = 3111,
  CODE_FOR_lshrv8hi3_mask = 3112,
  CODE_FOR_ashlv8si3 = 3113,
  CODE_FOR_ashlv8si3_mask = 3114,
  CODE_FOR_lshrv8si3 = 3115,
  CODE_FOR_lshrv8si3_mask = 3116,
  CODE_FOR_ashlv4si3 = 3117,
  CODE_FOR_ashlv4si3_mask = 3118,
  CODE_FOR_lshrv4si3 = 3119,
  CODE_FOR_lshrv4si3_mask = 3120,
  CODE_FOR_ashlv4di3 = 3121,
  CODE_FOR_ashlv4di3_mask = 3122,
  CODE_FOR_lshrv4di3 = 3123,
  CODE_FOR_lshrv4di3_mask = 3124,
  CODE_FOR_ashlv2di3 = 3125,
  CODE_FOR_ashlv2di3_mask = 3126,
  CODE_FOR_lshrv2di3 = 3127,
  CODE_FOR_lshrv2di3_mask = 3128,
  CODE_FOR_ashlv16si3 = 3129,
  CODE_FOR_ashlv16si3_mask = 3130,
  CODE_FOR_lshrv16si3 = 3131,
  CODE_FOR_lshrv16si3_mask = 3132,
  CODE_FOR_ashlv8di3 = 3133,
  CODE_FOR_ashlv8di3_mask = 3134,
  CODE_FOR_lshrv8di3 = 3135,
  CODE_FOR_lshrv8di3_mask = 3136,
  CODE_FOR_avx512bw_ashlv4ti3 = 3137,
  CODE_FOR_avx2_ashlv2ti3 = 3138,
  CODE_FOR_sse2_ashlv1ti3 = 3139,
  CODE_FOR_avx512bw_lshrv4ti3 = 3140,
  CODE_FOR_avx2_lshrv2ti3 = 3141,
  CODE_FOR_sse2_lshrv1ti3 = 3142,
  CODE_FOR_avx512f_rolvv16si = 3143,
  CODE_FOR_avx512f_rolvv16si_mask = 3144,
  CODE_FOR_avx512f_rorvv16si = 3145,
  CODE_FOR_avx512f_rorvv16si_mask = 3146,
  CODE_FOR_avx512vl_rolvv8si = 3147,
  CODE_FOR_avx512vl_rolvv8si_mask = 3148,
  CODE_FOR_avx512vl_rorvv8si = 3149,
  CODE_FOR_avx512vl_rorvv8si_mask = 3150,
  CODE_FOR_avx512vl_rolvv4si = 3151,
  CODE_FOR_avx512vl_rolvv4si_mask = 3152,
  CODE_FOR_avx512vl_rorvv4si = 3153,
  CODE_FOR_avx512vl_rorvv4si_mask = 3154,
  CODE_FOR_avx512f_rolvv8di = 3155,
  CODE_FOR_avx512f_rolvv8di_mask = 3156,
  CODE_FOR_avx512f_rorvv8di = 3157,
  CODE_FOR_avx512f_rorvv8di_mask = 3158,
  CODE_FOR_avx512vl_rolvv4di = 3159,
  CODE_FOR_avx512vl_rolvv4di_mask = 3160,
  CODE_FOR_avx512vl_rorvv4di = 3161,
  CODE_FOR_avx512vl_rorvv4di_mask = 3162,
  CODE_FOR_avx512vl_rolvv2di = 3163,
  CODE_FOR_avx512vl_rolvv2di_mask = 3164,
  CODE_FOR_avx512vl_rorvv2di = 3165,
  CODE_FOR_avx512vl_rorvv2di_mask = 3166,
  CODE_FOR_avx512f_rolv16si = 3167,
  CODE_FOR_avx512f_rolv16si_mask = 3168,
  CODE_FOR_avx512f_rorv16si = 3169,
  CODE_FOR_avx512f_rorv16si_mask = 3170,
  CODE_FOR_avx512vl_rolv8si = 3171,
  CODE_FOR_avx512vl_rolv8si_mask = 3172,
  CODE_FOR_avx512vl_rorv8si = 3173,
  CODE_FOR_avx512vl_rorv8si_mask = 3174,
  CODE_FOR_avx512vl_rolv4si = 3175,
  CODE_FOR_avx512vl_rolv4si_mask = 3176,
  CODE_FOR_avx512vl_rorv4si = 3177,
  CODE_FOR_avx512vl_rorv4si_mask = 3178,
  CODE_FOR_avx512f_rolv8di = 3179,
  CODE_FOR_avx512f_rolv8di_mask = 3180,
  CODE_FOR_avx512f_rorv8di = 3181,
  CODE_FOR_avx512f_rorv8di_mask = 3182,
  CODE_FOR_avx512vl_rolv4di = 3183,
  CODE_FOR_avx512vl_rolv4di_mask = 3184,
  CODE_FOR_avx512vl_rorv4di = 3185,
  CODE_FOR_avx512vl_rorv4di_mask = 3186,
  CODE_FOR_avx512vl_rolv2di = 3187,
  CODE_FOR_avx512vl_rolv2di_mask = 3188,
  CODE_FOR_avx512vl_rorv2di = 3189,
  CODE_FOR_avx512vl_rorv2di_mask = 3190,
  CODE_FOR_smaxv64qi3_mask = 3252,
  CODE_FOR_sminv64qi3_mask = 3254,
  CODE_FOR_umaxv64qi3_mask = 3256,
  CODE_FOR_uminv64qi3_mask = 3258,
  CODE_FOR_smaxv16qi3_mask = 3260,
  CODE_FOR_sminv16qi3_mask = 3262,
  CODE_FOR_umaxv16qi3_mask = 3264,
  CODE_FOR_uminv16qi3_mask = 3266,
  CODE_FOR_smaxv32qi3_mask = 3268,
  CODE_FOR_sminv32qi3_mask = 3270,
  CODE_FOR_umaxv32qi3_mask = 3272,
  CODE_FOR_uminv32qi3_mask = 3274,
  CODE_FOR_smaxv32hi3_mask = 3276,
  CODE_FOR_sminv32hi3_mask = 3278,
  CODE_FOR_umaxv32hi3_mask = 3280,
  CODE_FOR_uminv32hi3_mask = 3282,
  CODE_FOR_smaxv16hi3_mask = 3284,
  CODE_FOR_sminv16hi3_mask = 3286,
  CODE_FOR_umaxv16hi3_mask = 3288,
  CODE_FOR_uminv16hi3_mask = 3290,
  CODE_FOR_smaxv8hi3_mask = 3292,
  CODE_FOR_sminv8hi3_mask = 3294,
  CODE_FOR_umaxv8hi3_mask = 3296,
  CODE_FOR_uminv8hi3_mask = 3298,
  CODE_FOR_avx512bw_eqv64qi3_1 = 3323,
  CODE_FOR_avx512bw_eqv64qi3_mask_1 = 3324,
  CODE_FOR_avx512vl_eqv16qi3_1 = 3325,
  CODE_FOR_avx512vl_eqv16qi3_mask_1 = 3326,
  CODE_FOR_avx512vl_eqv32qi3_1 = 3327,
  CODE_FOR_avx512vl_eqv32qi3_mask_1 = 3328,
  CODE_FOR_avx512bw_eqv32hi3_1 = 3329,
  CODE_FOR_avx512bw_eqv32hi3_mask_1 = 3330,
  CODE_FOR_avx512vl_eqv16hi3_1 = 3331,
  CODE_FOR_avx512vl_eqv16hi3_mask_1 = 3332,
  CODE_FOR_avx512vl_eqv8hi3_1 = 3333,
  CODE_FOR_avx512vl_eqv8hi3_mask_1 = 3334,
  CODE_FOR_avx512f_eqv16si3_1 = 3335,
  CODE_FOR_avx512f_eqv16si3_mask_1 = 3336,
  CODE_FOR_avx512vl_eqv8si3_1 = 3337,
  CODE_FOR_avx512vl_eqv8si3_mask_1 = 3338,
  CODE_FOR_avx512vl_eqv4si3_1 = 3339,
  CODE_FOR_avx512vl_eqv4si3_mask_1 = 3340,
  CODE_FOR_avx512f_eqv8di3_1 = 3341,
  CODE_FOR_avx512f_eqv8di3_mask_1 = 3342,
  CODE_FOR_avx512vl_eqv4di3_1 = 3343,
  CODE_FOR_avx512vl_eqv4di3_mask_1 = 3344,
  CODE_FOR_avx512vl_eqv2di3_1 = 3345,
  CODE_FOR_avx512vl_eqv2di3_mask_1 = 3346,
  CODE_FOR_sse4_2_gtv2di3 = 3351,
  CODE_FOR_avx2_gtv32qi3 = 3352,
  CODE_FOR_avx2_gtv16hi3 = 3353,
  CODE_FOR_avx2_gtv8si3 = 3354,
  CODE_FOR_avx2_gtv4di3 = 3355,
  CODE_FOR_avx512f_gtv16si3 = 3356,
  CODE_FOR_avx512f_gtv16si3_mask = 3357,
  CODE_FOR_avx512vl_gtv8si3 = 3358,
  CODE_FOR_avx512vl_gtv8si3_mask = 3359,
  CODE_FOR_avx512vl_gtv4si3 = 3360,
  CODE_FOR_avx512vl_gtv4si3_mask = 3361,
  CODE_FOR_avx512f_gtv8di3 = 3362,
  CODE_FOR_avx512f_gtv8di3_mask = 3363,
  CODE_FOR_avx512vl_gtv4di3 = 3364,
  CODE_FOR_avx512vl_gtv4di3_mask = 3365,
  CODE_FOR_avx512vl_gtv2di3 = 3366,
  CODE_FOR_avx512vl_gtv2di3_mask = 3367,
  CODE_FOR_avx512bw_gtv64qi3 = 3368,
  CODE_FOR_avx512bw_gtv64qi3_mask = 3369,
  CODE_FOR_avx512vl_gtv16qi3 = 3370,
  CODE_FOR_avx512vl_gtv16qi3_mask = 3371,
  CODE_FOR_avx512vl_gtv32qi3 = 3372,
  CODE_FOR_avx512vl_gtv32qi3_mask = 3373,
  CODE_FOR_avx512bw_gtv32hi3 = 3374,
  CODE_FOR_avx512bw_gtv32hi3_mask = 3375,
  CODE_FOR_avx512vl_gtv16hi3 = 3376,
  CODE_FOR_avx512vl_gtv16hi3_mask = 3377,
  CODE_FOR_avx512vl_gtv8hi3 = 3378,
  CODE_FOR_avx512vl_gtv8hi3_mask = 3379,
  CODE_FOR_sse2_gtv16qi3 = 3380,
  CODE_FOR_sse2_gtv8hi3 = 3381,
  CODE_FOR_sse2_gtv4si3 = 3382,
  CODE_FOR_andv16si3_mask = 3420,
  CODE_FOR_iorv16si3_mask = 3422,
  CODE_FOR_xorv16si3_mask = 3424,
  CODE_FOR_andv8si3_mask = 3426,
  CODE_FOR_iorv8si3_mask = 3428,
  CODE_FOR_xorv8si3_mask = 3430,
  CODE_FOR_andv4si3_mask = 3432,
  CODE_FOR_iorv4si3_mask = 3434,
  CODE_FOR_xorv4si3_mask = 3436,
  CODE_FOR_andv8di3_mask = 3438,
  CODE_FOR_iorv8di3_mask = 3440,
  CODE_FOR_xorv8di3_mask = 3442,
  CODE_FOR_andv4di3_mask = 3444,
  CODE_FOR_iorv4di3_mask = 3446,
  CODE_FOR_xorv4di3_mask = 3448,
  CODE_FOR_andv2di3_mask = 3450,
  CODE_FOR_iorv2di3_mask = 3452,
  CODE_FOR_xorv2di3_mask = 3454,
  CODE_FOR_avx512bw_testmv64qi3 = 3491,
  CODE_FOR_avx512bw_testmv64qi3_mask = 3492,
  CODE_FOR_avx512vl_testmv16qi3 = 3493,
  CODE_FOR_avx512vl_testmv16qi3_mask = 3494,
  CODE_FOR_avx512vl_testmv32qi3 = 3495,
  CODE_FOR_avx512vl_testmv32qi3_mask = 3496,
  CODE_FOR_avx512bw_testmv32hi3 = 3497,
  CODE_FOR_avx512bw_testmv32hi3_mask = 3498,
  CODE_FOR_avx512vl_testmv16hi3 = 3499,
  CODE_FOR_avx512vl_testmv16hi3_mask = 3500,
  CODE_FOR_avx512vl_testmv8hi3 = 3501,
  CODE_FOR_avx512vl_testmv8hi3_mask = 3502,
  CODE_FOR_avx512f_testmv16si3 = 3503,
  CODE_FOR_avx512f_testmv16si3_mask = 3504,
  CODE_FOR_avx512vl_testmv8si3 = 3505,
  CODE_FOR_avx512vl_testmv8si3_mask = 3506,
  CODE_FOR_avx512vl_testmv4si3 = 3507,
  CODE_FOR_avx512vl_testmv4si3_mask = 3508,
  CODE_FOR_avx512f_testmv8di3 = 3509,
  CODE_FOR_avx512f_testmv8di3_mask = 3510,
  CODE_FOR_avx512vl_testmv4di3 = 3511,
  CODE_FOR_avx512vl_testmv4di3_mask = 3512,
  CODE_FOR_avx512vl_testmv2di3 = 3513,
  CODE_FOR_avx512vl_testmv2di3_mask = 3514,
  CODE_FOR_avx512bw_testnmv64qi3 = 3515,
  CODE_FOR_avx512bw_testnmv64qi3_mask = 3516,
  CODE_FOR_avx512vl_testnmv16qi3 = 3517,
  CODE_FOR_avx512vl_testnmv16qi3_mask = 3518,
  CODE_FOR_avx512vl_testnmv32qi3 = 3519,
  CODE_FOR_avx512vl_testnmv32qi3_mask = 3520,
  CODE_FOR_avx512bw_testnmv32hi3 = 3521,
  CODE_FOR_avx512bw_testnmv32hi3_mask = 3522,
  CODE_FOR_avx512vl_testnmv16hi3 = 3523,
  CODE_FOR_avx512vl_testnmv16hi3_mask = 3524,
  CODE_FOR_avx512vl_testnmv8hi3 = 3525,
  CODE_FOR_avx512vl_testnmv8hi3_mask = 3526,
  CODE_FOR_avx512f_testnmv16si3 = 3527,
  CODE_FOR_avx512f_testnmv16si3_mask = 3528,
  CODE_FOR_avx512vl_testnmv8si3 = 3529,
  CODE_FOR_avx512vl_testnmv8si3_mask = 3530,
  CODE_FOR_avx512vl_testnmv4si3 = 3531,
  CODE_FOR_avx512vl_testnmv4si3_mask = 3532,
  CODE_FOR_avx512f_testnmv8di3 = 3533,
  CODE_FOR_avx512f_testnmv8di3_mask = 3534,
  CODE_FOR_avx512vl_testnmv4di3 = 3535,
  CODE_FOR_avx512vl_testnmv4di3_mask = 3536,
  CODE_FOR_avx512vl_testnmv2di3 = 3537,
  CODE_FOR_avx512vl_testnmv2di3_mask = 3538,
  CODE_FOR_avx512bw_packsswb = 3539,
  CODE_FOR_avx512bw_packsswb_mask = 3540,
  CODE_FOR_avx2_packsswb = 3541,
  CODE_FOR_avx2_packsswb_mask = 3542,
  CODE_FOR_sse2_packsswb = 3543,
  CODE_FOR_sse2_packsswb_mask = 3544,
  CODE_FOR_avx512bw_packssdw = 3545,
  CODE_FOR_avx512bw_packssdw_mask = 3546,
  CODE_FOR_avx2_packssdw = 3547,
  CODE_FOR_avx2_packssdw_mask = 3548,
  CODE_FOR_sse2_packssdw = 3549,
  CODE_FOR_sse2_packssdw_mask = 3550,
  CODE_FOR_avx512bw_packuswb = 3551,
  CODE_FOR_avx512bw_packuswb_mask = 3552,
  CODE_FOR_avx2_packuswb = 3553,
  CODE_FOR_avx2_packuswb_mask = 3554,
  CODE_FOR_sse2_packuswb = 3555,
  CODE_FOR_sse2_packuswb_mask = 3556,
  CODE_FOR_avx512bw_interleave_highv64qi = 3557,
  CODE_FOR_avx512bw_interleave_highv64qi_mask = 3558,
  CODE_FOR_avx2_interleave_highv32qi = 3559,
  CODE_FOR_avx2_interleave_highv32qi_mask = 3560,
  CODE_FOR_vec_interleave_highv16qi = 3561,
  CODE_FOR_vec_interleave_highv16qi_mask = 3562,
  CODE_FOR_avx512bw_interleave_lowv64qi = 3563,
  CODE_FOR_avx512bw_interleave_lowv64qi_mask = 3564,
  CODE_FOR_avx2_interleave_lowv32qi = 3565,
  CODE_FOR_avx2_interleave_lowv32qi_mask = 3566,
  CODE_FOR_vec_interleave_lowv16qi = 3567,
  CODE_FOR_vec_interleave_lowv16qi_mask = 3568,
  CODE_FOR_avx512bw_interleave_highv32hi = 3569,
  CODE_FOR_avx512bw_interleave_highv32hi_mask = 3570,
  CODE_FOR_avx2_interleave_highv16hi = 3571,
  CODE_FOR_avx2_interleave_highv16hi_mask = 3572,
  CODE_FOR_vec_interleave_highv8hi = 3573,
  CODE_FOR_vec_interleave_highv8hi_mask = 3574,
  CODE_FOR_avx512bw_interleave_lowv32hi_mask = 3576,
  CODE_FOR_avx2_interleave_lowv16hi = 3577,
  CODE_FOR_avx2_interleave_lowv16hi_mask = 3578,
  CODE_FOR_vec_interleave_lowv8hi = 3579,
  CODE_FOR_vec_interleave_lowv8hi_mask = 3580,
  CODE_FOR_avx2_interleave_highv8si = 3581,
  CODE_FOR_avx2_interleave_highv8si_mask = 3582,
  CODE_FOR_avx512f_interleave_highv16si_mask = 3584,
  CODE_FOR_vec_interleave_highv4si = 3585,
  CODE_FOR_vec_interleave_highv4si_mask = 3586,
  CODE_FOR_avx2_interleave_lowv8si = 3587,
  CODE_FOR_avx2_interleave_lowv8si_mask = 3588,
  CODE_FOR_avx512f_interleave_lowv16si_mask = 3590,
  CODE_FOR_vec_interleave_lowv4si = 3591,
  CODE_FOR_vec_interleave_lowv4si_mask = 3592,
  CODE_FOR_sse4_1_pinsrb = 3593,
  CODE_FOR_sse2_pinsrw = 3594,
  CODE_FOR_sse4_1_pinsrd = 3595,
  CODE_FOR_sse4_1_pinsrq = 3596,
  CODE_FOR_avx512dq_vinsertf64x2_1_mask = 3598,
  CODE_FOR_avx512dq_vinserti64x2_1_mask = 3600,
  CODE_FOR_avx512f_vinsertf32x4_1_mask = 3602,
  CODE_FOR_avx512f_vinserti32x4_1_mask = 3604,
  CODE_FOR_vec_set_lo_v16sf = 3605,
  CODE_FOR_vec_set_lo_v16sf_mask = 3606,
  CODE_FOR_vec_set_lo_v16si = 3607,
  CODE_FOR_vec_set_lo_v16si_mask = 3608,
  CODE_FOR_vec_set_hi_v16sf = 3609,
  CODE_FOR_vec_set_hi_v16sf_mask = 3610,
  CODE_FOR_vec_set_hi_v16si = 3611,
  CODE_FOR_vec_set_hi_v16si_mask = 3612,
  CODE_FOR_vec_set_lo_v8df = 3613,
  CODE_FOR_vec_set_lo_v8df_mask = 3614,
  CODE_FOR_vec_set_lo_v8di = 3615,
  CODE_FOR_vec_set_lo_v8di_mask = 3616,
  CODE_FOR_vec_set_hi_v8df = 3617,
  CODE_FOR_vec_set_hi_v8df_mask = 3618,
  CODE_FOR_vec_set_hi_v8di = 3619,
  CODE_FOR_vec_set_hi_v8di_mask = 3620,
  CODE_FOR_avx512dq_shuf_i64x2_1_mask = 3622,
  CODE_FOR_avx512dq_shuf_f64x2_1_mask = 3624,
  CODE_FOR_avx512f_shuf_f64x2_1 = 3625,
  CODE_FOR_avx512f_shuf_f64x2_1_mask = 3626,
  CODE_FOR_avx512f_shuf_i64x2_1 = 3627,
  CODE_FOR_avx512f_shuf_i64x2_1_mask = 3628,
  CODE_FOR_avx512vl_shuf_i32x4_1_mask = 3630,
  CODE_FOR_avx512vl_shuf_f32x4_1_mask = 3632,
  CODE_FOR_avx512f_shuf_f32x4_1 = 3633,
  CODE_FOR_avx512f_shuf_f32x4_1_mask = 3634,
  CODE_FOR_avx512f_shuf_i32x4_1 = 3635,
  CODE_FOR_avx512f_shuf_i32x4_1_mask = 3636,
  CODE_FOR_avx512f_pshufd_1 = 3637,
  CODE_FOR_avx512f_pshufd_1_mask = 3638,
  CODE_FOR_avx2_pshufd_1 = 3639,
  CODE_FOR_avx2_pshufd_1_mask = 3640,
  CODE_FOR_sse2_pshufd_1 = 3641,
  CODE_FOR_sse2_pshufd_1_mask = 3642,
  CODE_FOR_avx512bw_pshuflwv32hi_mask = 3644,
  CODE_FOR_avx2_pshuflw_1 = 3645,
  CODE_FOR_avx2_pshuflw_1_mask = 3646,
  CODE_FOR_sse2_pshuflw_1 = 3647,
  CODE_FOR_sse2_pshuflw_1_mask = 3648,
  CODE_FOR_avx512bw_pshufhwv32hi_mask = 3650,
  CODE_FOR_avx2_pshufhw_1 = 3651,
  CODE_FOR_avx2_pshufhw_1_mask = 3652,
  CODE_FOR_sse2_pshufhw_1 = 3653,
  CODE_FOR_sse2_pshufhw_1_mask = 3654,
  CODE_FOR_sse2_loadld = 3655,
  CODE_FOR_vec_concatv2di = 3677,
  CODE_FOR_avx512f_psadbw = 3690,
  CODE_FOR_avx2_psadbw = 3691,
  CODE_FOR_sse2_psadbw = 3692,
  CODE_FOR_avx_movmskps256 = 3693,
  CODE_FOR_sse_movmskps = 3694,
  CODE_FOR_avx_movmskpd256 = 3695,
  CODE_FOR_sse2_movmskpd = 3696,
  CODE_FOR_avx2_pmovmskb = 3697,
  CODE_FOR_sse2_pmovmskb = 3698,
  CODE_FOR_sse_ldmxcsr = 3701,
  CODE_FOR_sse_stmxcsr = 3702,
  CODE_FOR_sse2_clflush = 3703,
  CODE_FOR_sse3_mwait = 3704,
  CODE_FOR_sse3_monitor_si = 3705,
  CODE_FOR_sse3_monitor_di = 3706,
  CODE_FOR_avx2_phaddwv16hi3 = 3707,
  CODE_FOR_avx2_phaddswv16hi3 = 3708,
  CODE_FOR_avx2_phsubwv16hi3 = 3709,
  CODE_FOR_avx2_phsubswv16hi3 = 3710,
  CODE_FOR_ssse3_phaddwv8hi3 = 3711,
  CODE_FOR_ssse3_phaddswv8hi3 = 3712,
  CODE_FOR_ssse3_phsubwv8hi3 = 3713,
  CODE_FOR_ssse3_phsubswv8hi3 = 3714,
  CODE_FOR_ssse3_phaddwv4hi3 = 3715,
  CODE_FOR_ssse3_phaddswv4hi3 = 3716,
  CODE_FOR_ssse3_phsubwv4hi3 = 3717,
  CODE_FOR_ssse3_phsubswv4hi3 = 3718,
  CODE_FOR_avx2_phadddv8si3 = 3719,
  CODE_FOR_avx2_phsubdv8si3 = 3720,
  CODE_FOR_ssse3_phadddv4si3 = 3721,
  CODE_FOR_ssse3_phsubdv4si3 = 3722,
  CODE_FOR_ssse3_phadddv2si3 = 3723,
  CODE_FOR_ssse3_phsubdv2si3 = 3724,
  CODE_FOR_avx2_pmaddubsw256 = 3725,
  CODE_FOR_avx512bw_pmaddubsw512v8hi = 3726,
  CODE_FOR_avx512bw_pmaddubsw512v8hi_mask = 3727,
  CODE_FOR_avx512bw_pmaddubsw512v16hi = 3728,
  CODE_FOR_avx512bw_pmaddubsw512v16hi_mask = 3729,
  CODE_FOR_avx512bw_pmaddubsw512v32hi = 3730,
  CODE_FOR_avx512bw_pmaddubsw512v32hi_mask = 3731,
  CODE_FOR_avx512bw_umulhrswv32hi3 = 3732,
  CODE_FOR_avx512bw_umulhrswv32hi3_mask = 3733,
  CODE_FOR_ssse3_pmaddubsw128 = 3734,
  CODE_FOR_ssse3_pmaddubsw = 3735,
  CODE_FOR_avx512bw_pshufbv64qi3 = 3743,
  CODE_FOR_avx512bw_pshufbv64qi3_mask = 3744,
  CODE_FOR_avx2_pshufbv32qi3 = 3745,
  CODE_FOR_avx2_pshufbv32qi3_mask = 3746,
  CODE_FOR_ssse3_pshufbv16qi3 = 3747,
  CODE_FOR_ssse3_pshufbv16qi3_mask = 3748,
  CODE_FOR_ssse3_pshufbv8qi3 = 3749,
  CODE_FOR_avx2_psignv32qi3 = 3750,
  CODE_FOR_ssse3_psignv16qi3 = 3751,
  CODE_FOR_avx2_psignv16hi3 = 3752,
  CODE_FOR_ssse3_psignv8hi3 = 3753,
  CODE_FOR_avx2_psignv8si3 = 3754,
  CODE_FOR_ssse3_psignv4si3 = 3755,
  CODE_FOR_ssse3_psignv8qi3 = 3756,
  CODE_FOR_ssse3_psignv4hi3 = 3757,
  CODE_FOR_ssse3_psignv2si3 = 3758,
  CODE_FOR_avx512bw_palignrv64qi_mask = 3759,
  CODE_FOR_avx2_palignrv32qi_mask = 3760,
  CODE_FOR_ssse3_palignrv16qi_mask = 3761,
  CODE_FOR_avx512bw_palignrv4ti = 3762,
  CODE_FOR_avx2_palignrv2ti = 3763,
  CODE_FOR_ssse3_palignrti = 3764,
  CODE_FOR_ssse3_palignrdi = 3765,
  CODE_FOR_absv16si2_mask = 3778,
  CODE_FOR_absv8si2_mask = 3779,
  CODE_FOR_absv4si2_mask = 3780,
  CODE_FOR_absv8di2_mask = 3781,
  CODE_FOR_absv4di2_mask = 3782,
  CODE_FOR_absv2di2_mask = 3783,
  CODE_FOR_absv64qi2_mask = 3784,
  CODE_FOR_absv16qi2_mask = 3785,
  CODE_FOR_absv32qi2_mask = 3786,
  CODE_FOR_absv32hi2_mask = 3787,
  CODE_FOR_absv16hi2_mask = 3788,
  CODE_FOR_absv8hi2_mask = 3789,
  CODE_FOR_absv8qi2 = 3790,
  CODE_FOR_absv4hi2 = 3791,
  CODE_FOR_absv2si2 = 3792,
  CODE_FOR_sse4a_movntsf = 3793,
  CODE_FOR_sse4a_movntdf = 3794,
  CODE_FOR_sse4a_vmmovntv4sf = 3795,
  CODE_FOR_sse4a_vmmovntv2df = 3796,
  CODE_FOR_sse4a_extrqi = 3797,
  CODE_FOR_sse4a_extrq = 3798,
  CODE_FOR_sse4a_insertqi = 3799,
  CODE_FOR_sse4a_insertq = 3800,
  CODE_FOR_avx_blendps256 = 3801,
  CODE_FOR_sse4_1_blendps = 3802,
  CODE_FOR_avx_blendpd256 = 3803,
  CODE_FOR_sse4_1_blendpd = 3804,
  CODE_FOR_avx_blendvps256 = 3805,
  CODE_FOR_sse4_1_blendvps = 3806,
  CODE_FOR_avx_blendvpd256 = 3807,
  CODE_FOR_sse4_1_blendvpd = 3808,
  CODE_FOR_avx_dpps256 = 3809,
  CODE_FOR_sse4_1_dpps = 3810,
  CODE_FOR_avx_dppd256 = 3811,
  CODE_FOR_sse4_1_dppd = 3812,
  CODE_FOR_avx512f_movntdqa = 3813,
  CODE_FOR_avx2_movntdqa = 3814,
  CODE_FOR_sse4_1_movntdqa = 3815,
  CODE_FOR_avx2_mpsadbw = 3816,
  CODE_FOR_sse4_1_mpsadbw = 3817,
  CODE_FOR_avx512bw_packusdw = 3818,
  CODE_FOR_avx512bw_packusdw_mask = 3819,
  CODE_FOR_avx2_packusdw = 3820,
  CODE_FOR_avx2_packusdw_mask = 3821,
  CODE_FOR_sse4_1_packusdw = 3822,
  CODE_FOR_sse4_1_packusdw_mask = 3823,
  CODE_FOR_avx2_pblendvb = 3824,
  CODE_FOR_sse4_1_pblendvb = 3825,
  CODE_FOR_sse4_1_pblendw = 3826,
  CODE_FOR_avx2_pblenddv8si = 3828,
  CODE_FOR_avx2_pblenddv4si = 3829,
  CODE_FOR_sse4_1_phminposuw = 3830,
  CODE_FOR_avx2_sign_extendv16qiv16hi2 = 3831,
  CODE_FOR_avx2_sign_extendv16qiv16hi2_mask = 3832,
  CODE_FOR_avx2_zero_extendv16qiv16hi2 = 3833,
  CODE_FOR_avx2_zero_extendv16qiv16hi2_mask = 3834,
  CODE_FOR_avx512bw_sign_extendv32qiv32hi2 = 3835,
  CODE_FOR_avx512bw_sign_extendv32qiv32hi2_mask = 3836,
  CODE_FOR_avx512bw_zero_extendv32qiv32hi2 = 3837,
  CODE_FOR_avx512bw_zero_extendv32qiv32hi2_mask = 3838,
  CODE_FOR_sse4_1_sign_extendv8qiv8hi2 = 3839,
  CODE_FOR_sse4_1_sign_extendv8qiv8hi2_mask = 3840,
  CODE_FOR_sse4_1_zero_extendv8qiv8hi2 = 3841,
  CODE_FOR_sse4_1_zero_extendv8qiv8hi2_mask = 3842,
  CODE_FOR_avx512f_sign_extendv16qiv16si2_mask = 3844,
  CODE_FOR_avx512f_zero_extendv16qiv16si2_mask = 3846,
  CODE_FOR_avx2_sign_extendv8qiv8si2 = 3847,
  CODE_FOR_avx2_sign_extendv8qiv8si2_mask = 3848,
  CODE_FOR_avx2_zero_extendv8qiv8si2 = 3849,
  CODE_FOR_avx2_zero_extendv8qiv8si2_mask = 3850,
  CODE_FOR_sse4_1_sign_extendv4qiv4si2 = 3851,
  CODE_FOR_sse4_1_sign_extendv4qiv4si2_mask = 3852,
  CODE_FOR_sse4_1_zero_extendv4qiv4si2 = 3853,
  CODE_FOR_sse4_1_zero_extendv4qiv4si2_mask = 3854,
  CODE_FOR_avx512f_sign_extendv16hiv16si2 = 3855,
  CODE_FOR_avx512f_sign_extendv16hiv16si2_mask = 3856,
  CODE_FOR_avx512f_zero_extendv16hiv16si2 = 3857,
  CODE_FOR_avx512f_zero_extendv16hiv16si2_mask = 3858,
  CODE_FOR_avx2_sign_extendv8hiv8si2 = 3859,
  CODE_FOR_avx2_sign_extendv8hiv8si2_mask = 3860,
  CODE_FOR_avx2_zero_extendv8hiv8si2 = 3861,
  CODE_FOR_avx2_zero_extendv8hiv8si2_mask = 3862,
  CODE_FOR_sse4_1_sign_extendv4hiv4si2 = 3863,
  CODE_FOR_sse4_1_sign_extendv4hiv4si2_mask = 3864,
  CODE_FOR_sse4_1_zero_extendv4hiv4si2 = 3865,
  CODE_FOR_sse4_1_zero_extendv4hiv4si2_mask = 3866,
  CODE_FOR_avx512f_sign_extendv8qiv8di2 = 3867,
  CODE_FOR_avx512f_sign_extendv8qiv8di2_mask = 3868,
  CODE_FOR_avx512f_zero_extendv8qiv8di2 = 3869,
  CODE_FOR_avx512f_zero_extendv8qiv8di2_mask = 3870,
  CODE_FOR_avx2_sign_extendv4qiv4di2 = 3871,
  CODE_FOR_avx2_sign_extendv4qiv4di2_mask = 3872,
  CODE_FOR_avx2_zero_extendv4qiv4di2 = 3873,
  CODE_FOR_avx2_zero_extendv4qiv4di2_mask = 3874,
  CODE_FOR_sse4_1_sign_extendv2qiv2di2 = 3875,
  CODE_FOR_sse4_1_sign_extendv2qiv2di2_mask = 3876,
  CODE_FOR_sse4_1_zero_extendv2qiv2di2 = 3877,
  CODE_FOR_sse4_1_zero_extendv2qiv2di2_mask = 3878,
  CODE_FOR_avx512f_sign_extendv8hiv8di2 = 3879,
  CODE_FOR_avx512f_sign_extendv8hiv8di2_mask = 3880,
  CODE_FOR_avx512f_zero_extendv8hiv8di2 = 3881,
  CODE_FOR_avx512f_zero_extendv8hiv8di2_mask = 3882,
  CODE_FOR_avx2_sign_extendv4hiv4di2 = 3883,
  CODE_FOR_avx2_sign_extendv4hiv4di2_mask = 3884,
  CODE_FOR_avx2_zero_extendv4hiv4di2 = 3885,
  CODE_FOR_avx2_zero_extendv4hiv4di2_mask = 3886,
  CODE_FOR_sse4_1_sign_extendv2hiv2di2 = 3887,
  CODE_FOR_sse4_1_sign_extendv2hiv2di2_mask = 3888,
  CODE_FOR_sse4_1_zero_extendv2hiv2di2 = 3889,
  CODE_FOR_sse4_1_zero_extendv2hiv2di2_mask = 3890,
  CODE_FOR_avx512f_sign_extendv8siv8di2 = 3891,
  CODE_FOR_avx512f_sign_extendv8siv8di2_mask = 3892,
  CODE_FOR_avx512f_zero_extendv8siv8di2 = 3893,
  CODE_FOR_avx512f_zero_extendv8siv8di2_mask = 3894,
  CODE_FOR_avx2_sign_extendv4siv4di2 = 3895,
  CODE_FOR_avx2_sign_extendv4siv4di2_mask = 3896,
  CODE_FOR_avx2_zero_extendv4siv4di2 = 3897,
  CODE_FOR_avx2_zero_extendv4siv4di2_mask = 3898,
  CODE_FOR_sse4_1_sign_extendv2siv2di2 = 3899,
  CODE_FOR_sse4_1_sign_extendv2siv2di2_mask = 3900,
  CODE_FOR_sse4_1_zero_extendv2siv2di2 = 3901,
  CODE_FOR_sse4_1_zero_extendv2siv2di2_mask = 3902,
  CODE_FOR_avx_vtestps256 = 3903,
  CODE_FOR_avx_vtestps = 3904,
  CODE_FOR_avx_vtestpd256 = 3905,
  CODE_FOR_avx_vtestpd = 3906,
  CODE_FOR_avx_ptest256 = 3907,
  CODE_FOR_sse4_1_ptest = 3908,
  CODE_FOR_avx_roundps256 = 3909,
  CODE_FOR_sse4_1_roundps = 3910,
  CODE_FOR_avx_roundpd256 = 3911,
  CODE_FOR_sse4_1_roundpd = 3912,
  CODE_FOR_sse4_1_roundss = 3913,
  CODE_FOR_sse4_1_roundsd = 3914,
  CODE_FOR_sse4_2_pcmpestr = 3915,
  CODE_FOR_sse4_2_pcmpestri = 3917,
  CODE_FOR_sse4_2_pcmpestrm = 3918,
  CODE_FOR_sse4_2_pcmpestr_cconly = 3919,
  CODE_FOR_sse4_2_pcmpistr = 3920,
  CODE_FOR_sse4_2_pcmpistri = 3922,
  CODE_FOR_sse4_2_pcmpistrm = 3923,
  CODE_FOR_sse4_2_pcmpistr_cconly = 3924,
  CODE_FOR_avx512er_exp2v16sf = 3957,
  CODE_FOR_avx512er_exp2v16sf_round = 3958,
  CODE_FOR_avx512er_exp2v16sf_mask = 3959,
  CODE_FOR_avx512er_exp2v16sf_mask_round = 3960,
  CODE_FOR_avx512er_exp2v8df = 3961,
  CODE_FOR_avx512er_exp2v8df_round = 3962,
  CODE_FOR_avx512er_exp2v8df_mask = 3963,
  CODE_FOR_avx512er_exp2v8df_mask_round = 3964,
  CODE_FOR_avx512er_rcp28v16sf_mask = 3967,
  CODE_FOR_avx512er_rcp28v16sf_mask_round = 3968,
  CODE_FOR_avx512er_rcp28v8df_mask = 3971,
  CODE_FOR_avx512er_rcp28v8df_mask_round = 3972,
  CODE_FOR_avx512er_vmrcp28v4sf = 3973,
  CODE_FOR_avx512er_vmrcp28v4sf_round = 3974,
  CODE_FOR_avx512er_vmrcp28v2df = 3975,
  CODE_FOR_avx512er_vmrcp28v2df_round = 3976,
  CODE_FOR_avx512er_rsqrt28v16sf_mask = 3979,
  CODE_FOR_avx512er_rsqrt28v16sf_mask_round = 3980,
  CODE_FOR_avx512er_rsqrt28v8df_mask = 3983,
  CODE_FOR_avx512er_rsqrt28v8df_mask_round = 3984,
  CODE_FOR_avx512er_vmrsqrt28v4sf = 3985,
  CODE_FOR_avx512er_vmrsqrt28v4sf_round = 3986,
  CODE_FOR_avx512er_vmrsqrt28v2df = 3987,
  CODE_FOR_avx512er_vmrsqrt28v2df_round = 3988,
  CODE_FOR_xop_pmacsww = 3989,
  CODE_FOR_xop_pmacssww = 3990,
  CODE_FOR_xop_pmacsdd = 3991,
  CODE_FOR_xop_pmacssdd = 3992,
  CODE_FOR_xop_pmacsdql = 3993,
  CODE_FOR_xop_pmacssdql = 3994,
  CODE_FOR_xop_pmacsdqh = 3995,
  CODE_FOR_xop_pmacssdqh = 3996,
  CODE_FOR_xop_pmacswd = 3997,
  CODE_FOR_xop_pmacsswd = 3998,
  CODE_FOR_xop_pmadcswd = 3999,
  CODE_FOR_xop_pmadcsswd = 4000,
  CODE_FOR_xop_pcmov_v32qi256 = 4001,
  CODE_FOR_xop_pcmov_v16qi = 4002,
  CODE_FOR_xop_pcmov_v16hi256 = 4003,
  CODE_FOR_xop_pcmov_v8hi = 4004,
  CODE_FOR_xop_pcmov_v16si512 = 4005,
  CODE_FOR_xop_pcmov_v8si256 = 4006,
  CODE_FOR_xop_pcmov_v4si = 4007,
  CODE_FOR_xop_pcmov_v8di512 = 4008,
  CODE_FOR_xop_pcmov_v4di256 = 4009,
  CODE_FOR_xop_pcmov_v2di = 4010,
  CODE_FOR_xop_pcmov_v16sf512 = 4011,
  CODE_FOR_xop_pcmov_v8sf256 = 4012,
  CODE_FOR_xop_pcmov_v4sf = 4013,
  CODE_FOR_xop_pcmov_v8df512 = 4014,
  CODE_FOR_xop_pcmov_v4df256 = 4015,
  CODE_FOR_xop_pcmov_v2df = 4016,
  CODE_FOR_xop_phaddbw = 4017,
  CODE_FOR_xop_phaddubw = 4018,
  CODE_FOR_xop_phaddbd = 4019,
  CODE_FOR_xop_phaddubd = 4020,
  CODE_FOR_xop_phaddbq = 4021,
  CODE_FOR_xop_phaddubq = 4022,
  CODE_FOR_xop_phaddwd = 4023,
  CODE_FOR_xop_phadduwd = 4024,
  CODE_FOR_xop_phaddwq = 4025,
  CODE_FOR_xop_phadduwq = 4026,
  CODE_FOR_xop_phadddq = 4027,
  CODE_FOR_xop_phaddudq = 4028,
  CODE_FOR_xop_phsubbw = 4029,
  CODE_FOR_xop_phsubwd = 4030,
  CODE_FOR_xop_phsubdq = 4031,
  CODE_FOR_xop_pperm = 4032,
  CODE_FOR_xop_pperm_pack_v2di_v4si = 4033,
  CODE_FOR_xop_pperm_pack_v4si_v8hi = 4034,
  CODE_FOR_xop_pperm_pack_v8hi_v16qi = 4035,
  CODE_FOR_xop_rotlv16qi3 = 4036,
  CODE_FOR_xop_rotlv8hi3 = 4037,
  CODE_FOR_xop_rotlv4si3 = 4038,
  CODE_FOR_xop_rotlv2di3 = 4039,
  CODE_FOR_xop_rotrv16qi3 = 4040,
  CODE_FOR_xop_rotrv8hi3 = 4041,
  CODE_FOR_xop_rotrv4si3 = 4042,
  CODE_FOR_xop_rotrv2di3 = 4043,
  CODE_FOR_xop_vrotlv16qi3 = 4044,
  CODE_FOR_xop_vrotlv8hi3 = 4045,
  CODE_FOR_xop_vrotlv4si3 = 4046,
  CODE_FOR_xop_vrotlv2di3 = 4047,
  CODE_FOR_xop_shav16qi3 = 4048,
  CODE_FOR_xop_shav8hi3 = 4049,
  CODE_FOR_xop_shav4si3 = 4050,
  CODE_FOR_xop_shav2di3 = 4051,
  CODE_FOR_xop_shlv16qi3 = 4052,
  CODE_FOR_xop_shlv8hi3 = 4053,
  CODE_FOR_xop_shlv4si3 = 4054,
  CODE_FOR_xop_shlv2di3 = 4055,
  CODE_FOR_xop_frczsf2 = 4056,
  CODE_FOR_xop_frczdf2 = 4057,
  CODE_FOR_xop_frczv4sf2 = 4058,
  CODE_FOR_xop_frczv2df2 = 4059,
  CODE_FOR_xop_frczv8sf2 = 4060,
  CODE_FOR_xop_frczv4df2 = 4061,
  CODE_FOR_xop_maskcmpv16qi3 = 4064,
  CODE_FOR_xop_maskcmpv8hi3 = 4065,
  CODE_FOR_xop_maskcmpv4si3 = 4066,
  CODE_FOR_xop_maskcmpv2di3 = 4067,
  CODE_FOR_xop_maskcmp_unsv16qi3 = 4068,
  CODE_FOR_xop_maskcmp_unsv8hi3 = 4069,
  CODE_FOR_xop_maskcmp_unsv4si3 = 4070,
  CODE_FOR_xop_maskcmp_unsv2di3 = 4071,
  CODE_FOR_xop_maskcmp_uns2v16qi3 = 4072,
  CODE_FOR_xop_maskcmp_uns2v8hi3 = 4073,
  CODE_FOR_xop_maskcmp_uns2v4si3 = 4074,
  CODE_FOR_xop_maskcmp_uns2v2di3 = 4075,
  CODE_FOR_xop_pcom_tfv16qi3 = 4076,
  CODE_FOR_xop_pcom_tfv8hi3 = 4077,
  CODE_FOR_xop_pcom_tfv4si3 = 4078,
  CODE_FOR_xop_pcom_tfv2di3 = 4079,
  CODE_FOR_xop_vpermil2v8sf3 = 4080,
  CODE_FOR_xop_vpermil2v4sf3 = 4081,
  CODE_FOR_xop_vpermil2v4df3 = 4082,
  CODE_FOR_xop_vpermil2v2df3 = 4083,
  CODE_FOR_aesenc = 4084,
  CODE_FOR_aesenclast = 4085,
  CODE_FOR_aesdec = 4086,
  CODE_FOR_aesdeclast = 4087,
  CODE_FOR_aesimc = 4088,
  CODE_FOR_aeskeygenassist = 4089,
  CODE_FOR_pclmulqdq = 4090,
  CODE_FOR_avx_vzeroupper = 4092,
  CODE_FOR_avx2_pbroadcastv16si = 4093,
  CODE_FOR_avx2_pbroadcastv8di = 4094,
  CODE_FOR_avx2_pbroadcastv64qi = 4095,
  CODE_FOR_avx2_pbroadcastv32qi = 4096,
  CODE_FOR_avx2_pbroadcastv16qi = 4097,
  CODE_FOR_avx2_pbroadcastv32hi = 4098,
  CODE_FOR_avx2_pbroadcastv16hi = 4099,
  CODE_FOR_avx2_pbroadcastv8hi = 4100,
  CODE_FOR_avx2_pbroadcastv8si = 4101,
  CODE_FOR_avx2_pbroadcastv4si = 4102,
  CODE_FOR_avx2_pbroadcastv4di = 4103,
  CODE_FOR_avx2_pbroadcastv2di = 4104,
  CODE_FOR_avx2_pbroadcastv32qi_1 = 4105,
  CODE_FOR_avx2_pbroadcastv16hi_1 = 4106,
  CODE_FOR_avx2_pbroadcastv8si_1 = 4107,
  CODE_FOR_avx2_pbroadcastv4di_1 = 4108,
  CODE_FOR_avx2_permvarv8si = 4109,
  CODE_FOR_avx2_permvarv8si_mask = 4110,
  CODE_FOR_avx2_permvarv8sf = 4111,
  CODE_FOR_avx2_permvarv8sf_mask = 4112,
  CODE_FOR_avx512f_permvarv16si = 4113,
  CODE_FOR_avx512f_permvarv16si_mask = 4114,
  CODE_FOR_avx512f_permvarv16sf = 4115,
  CODE_FOR_avx512f_permvarv16sf_mask = 4116,
  CODE_FOR_avx512f_permvarv8di = 4117,
  CODE_FOR_avx512f_permvarv8di_mask = 4118,
  CODE_FOR_avx512f_permvarv8df = 4119,
  CODE_FOR_avx512f_permvarv8df_mask = 4120,
  CODE_FOR_avx2_permvarv4di = 4121,
  CODE_FOR_avx2_permvarv4di_mask = 4122,
  CODE_FOR_avx2_permvarv4df = 4123,
  CODE_FOR_avx2_permvarv4df_mask = 4124,
  CODE_FOR_avx512bw_permvarv64qi = 4125,
  CODE_FOR_avx512bw_permvarv64qi_mask = 4126,
  CODE_FOR_avx512vl_permvarv16qi = 4127,
  CODE_FOR_avx512vl_permvarv16qi_mask = 4128,
  CODE_FOR_avx512vl_permvarv32qi = 4129,
  CODE_FOR_avx512vl_permvarv32qi_mask = 4130,
  CODE_FOR_avx512vl_permvarv8hi = 4131,
  CODE_FOR_avx512vl_permvarv8hi_mask = 4132,
  CODE_FOR_avx512vl_permvarv16hi = 4133,
  CODE_FOR_avx512vl_permvarv16hi_mask = 4134,
  CODE_FOR_avx512bw_permvarv32hi = 4135,
  CODE_FOR_avx512bw_permvarv32hi_mask = 4136,
  CODE_FOR_avx2_permv4di_1 = 4137,
  CODE_FOR_avx2_permv4di_1_mask = 4138,
  CODE_FOR_avx2_permv4df_1 = 4139,
  CODE_FOR_avx2_permv4df_1_mask = 4140,
  CODE_FOR_avx512f_permv8di_1 = 4141,
  CODE_FOR_avx512f_permv8di_1_mask = 4142,
  CODE_FOR_avx512f_permv8df_1 = 4143,
  CODE_FOR_avx512f_permv8df_1_mask = 4144,
  CODE_FOR_avx2_permv2ti = 4145,
  CODE_FOR_avx2_vec_dupv4df = 4146,
  CODE_FOR_avx512f_vec_dupv16si_1 = 4147,
  CODE_FOR_avx512f_vec_dupv8di_1 = 4148,
  CODE_FOR_avx512bw_vec_dupv32hi_1 = 4149,
  CODE_FOR_avx512bw_vec_dupv64qi_1 = 4150,
  CODE_FOR_avx512f_vec_dupv16si = 4151,
  CODE_FOR_avx512f_vec_dupv16si_mask = 4152,
  CODE_FOR_avx512vl_vec_dupv8si = 4153,
  CODE_FOR_avx512vl_vec_dupv8si_mask = 4154,
  CODE_FOR_avx512vl_vec_dupv4si = 4155,
  CODE_FOR_avx512vl_vec_dupv4si_mask = 4156,
  CODE_FOR_avx512f_vec_dupv8di = 4157,
  CODE_FOR_avx512f_vec_dupv8di_mask = 4158,
  CODE_FOR_avx512vl_vec_dupv4di = 4159,
  CODE_FOR_avx512vl_vec_dupv4di_mask = 4160,
  CODE_FOR_avx512vl_vec_dupv2di = 4161,
  CODE_FOR_avx512vl_vec_dupv2di_mask = 4162,
  CODE_FOR_avx512f_vec_dupv16sf = 4163,
  CODE_FOR_avx512f_vec_dupv16sf_mask = 4164,
  CODE_FOR_avx512vl_vec_dupv8sf = 4165,
  CODE_FOR_avx512vl_vec_dupv8sf_mask = 4166,
  CODE_FOR_avx512vl_vec_dupv4sf = 4167,
  CODE_FOR_avx512vl_vec_dupv4sf_mask = 4168,
  CODE_FOR_avx512f_vec_dupv8df = 4169,
  CODE_FOR_avx512f_vec_dupv8df_mask = 4170,
  CODE_FOR_avx512vl_vec_dupv4df = 4171,
  CODE_FOR_avx512vl_vec_dupv4df_mask = 4172,
  CODE_FOR_avx512vl_vec_dupv2df = 4173,
  CODE_FOR_avx512vl_vec_dupv2df_mask = 4174,
  CODE_FOR_avx512bw_vec_dupv64qi = 4175,
  CODE_FOR_avx512bw_vec_dupv64qi_mask = 4176,
  CODE_FOR_avx512vl_vec_dupv16qi = 4177,
  CODE_FOR_avx512vl_vec_dupv16qi_mask = 4178,
  CODE_FOR_avx512vl_vec_dupv32qi = 4179,
  CODE_FOR_avx512vl_vec_dupv32qi_mask = 4180,
  CODE_FOR_avx512bw_vec_dupv32hi = 4181,
  CODE_FOR_avx512bw_vec_dupv32hi_mask = 4182,
  CODE_FOR_avx512vl_vec_dupv16hi = 4183,
  CODE_FOR_avx512vl_vec_dupv16hi_mask = 4184,
  CODE_FOR_avx512vl_vec_dupv8hi = 4185,
  CODE_FOR_avx512vl_vec_dupv8hi_mask = 4186,
  CODE_FOR_avx512f_broadcastv16sf_mask = 4188,
  CODE_FOR_avx512f_broadcastv16si_mask = 4190,
  CODE_FOR_avx512f_broadcastv8df_mask = 4192,
  CODE_FOR_avx512f_broadcastv8di_mask = 4194,
  CODE_FOR_avx512bw_vec_dup_gprv64qi_mask = 4196,
  CODE_FOR_avx512vl_vec_dup_gprv16qi_mask = 4198,
  CODE_FOR_avx512vl_vec_dup_gprv32qi_mask = 4200,
  CODE_FOR_avx512bw_vec_dup_gprv32hi_mask = 4202,
  CODE_FOR_avx512vl_vec_dup_gprv16hi_mask = 4204,
  CODE_FOR_avx512vl_vec_dup_gprv8hi_mask = 4206,
  CODE_FOR_avx512f_vec_dup_gprv16si_mask = 4208,
  CODE_FOR_avx512vl_vec_dup_gprv8si_mask = 4210,
  CODE_FOR_avx512vl_vec_dup_gprv4si_mask = 4212,
  CODE_FOR_avx512f_vec_dup_gprv8di_mask = 4214,
  CODE_FOR_avx512vl_vec_dup_gprv4di_mask = 4216,
  CODE_FOR_avx512vl_vec_dup_gprv2di_mask = 4218,
  CODE_FOR_avx512f_vec_dup_gprv16sf_mask = 4220,
  CODE_FOR_avx512vl_vec_dup_gprv8sf_mask = 4222,
  CODE_FOR_avx512vl_vec_dup_gprv4sf_mask = 4224,
  CODE_FOR_avx512f_vec_dup_gprv8df_mask = 4226,
  CODE_FOR_avx512vl_vec_dup_gprv4df_mask = 4228,
  CODE_FOR_avx512vl_vec_dup_gprv2df_mask = 4230,
  CODE_FOR_vec_dupv4sf = 4231,
  CODE_FOR_avx2_vbroadcasti128_v32qi = 4234,
  CODE_FOR_avx2_vbroadcasti128_v16hi = 4235,
  CODE_FOR_avx2_vbroadcasti128_v8si = 4236,
  CODE_FOR_avx2_vbroadcasti128_v4di = 4237,
  CODE_FOR_vec_dupv8si = 4244,
  CODE_FOR_vec_dupv8sf = 4245,
  CODE_FOR_vec_dupv4di = 4246,
  CODE_FOR_vec_dupv4df = 4247,
  CODE_FOR_avx_vbroadcastf128_v32qi = 4248,
  CODE_FOR_avx_vbroadcastf128_v16hi = 4249,
  CODE_FOR_avx_vbroadcastf128_v8si = 4250,
  CODE_FOR_avx_vbroadcastf128_v4di = 4251,
  CODE_FOR_avx_vbroadcastf128_v8sf = 4252,
  CODE_FOR_avx_vbroadcastf128_v4df = 4253,
  CODE_FOR_avx512dq_broadcastv16si_mask = 4255,
  CODE_FOR_avx512dq_broadcastv8si_mask = 4257,
  CODE_FOR_avx512dq_broadcastv4si_mask = 4259,
  CODE_FOR_avx512dq_broadcastv16sf_mask = 4261,
  CODE_FOR_avx512dq_broadcastv8sf_mask = 4263,
  CODE_FOR_avx512vl_broadcastv8si_mask_1 = 4265,
  CODE_FOR_avx512vl_broadcastv8sf_mask_1 = 4267,
  CODE_FOR_avx512dq_broadcastv16sf_mask_1 = 4269,
  CODE_FOR_avx512dq_broadcastv16si_mask_1 = 4271,
  CODE_FOR_avx512dq_broadcastv8di_mask_1 = 4273,
  CODE_FOR_avx512dq_broadcastv8df_mask_1 = 4275,
  CODE_FOR_avx512dq_broadcastv4di_mask_1 = 4277,
  CODE_FOR_avx512dq_broadcastv4df_mask_1 = 4279,
  CODE_FOR_avx512cd_maskb_vec_dupv8di = 4280,
  CODE_FOR_avx512cd_maskb_vec_dupv4di = 4281,
  CODE_FOR_avx512cd_maskb_vec_dupv2di = 4282,
  CODE_FOR_avx512cd_maskw_vec_dupv16si = 4283,
  CODE_FOR_avx512cd_maskw_vec_dupv8si = 4284,
  CODE_FOR_avx512cd_maskw_vec_dupv4si = 4285,
  CODE_FOR_avx512f_vpermilvarv16sf3 = 4301,
  CODE_FOR_avx512f_vpermilvarv16sf3_mask = 4302,
  CODE_FOR_avx_vpermilvarv8sf3 = 4303,
  CODE_FOR_avx_vpermilvarv8sf3_mask = 4304,
  CODE_FOR_avx_vpermilvarv4sf3 = 4305,
  CODE_FOR_avx_vpermilvarv4sf3_mask = 4306,
  CODE_FOR_avx512f_vpermilvarv8df3 = 4307,
  CODE_FOR_avx512f_vpermilvarv8df3_mask = 4308,
  CODE_FOR_avx_vpermilvarv4df3 = 4309,
  CODE_FOR_avx_vpermilvarv4df3_mask = 4310,
  CODE_FOR_avx_vpermilvarv2df3 = 4311,
  CODE_FOR_avx_vpermilvarv2df3_mask = 4312,
  CODE_FOR_avx512f_vpermi2varv16si3 = 4313,
  CODE_FOR_avx512f_vpermi2varv16si3_maskz_1 = 4314,
  CODE_FOR_avx512f_vpermi2varv16sf3 = 4315,
  CODE_FOR_avx512f_vpermi2varv16sf3_maskz_1 = 4316,
  CODE_FOR_avx512f_vpermi2varv8di3 = 4317,
  CODE_FOR_avx512f_vpermi2varv8di3_maskz_1 = 4318,
  CODE_FOR_avx512f_vpermi2varv8df3 = 4319,
  CODE_FOR_avx512f_vpermi2varv8df3_maskz_1 = 4320,
  CODE_FOR_avx512vl_vpermi2varv8si3 = 4321,
  CODE_FOR_avx512vl_vpermi2varv8si3_maskz_1 = 4322,
  CODE_FOR_avx512vl_vpermi2varv8sf3 = 4323,
  CODE_FOR_avx512vl_vpermi2varv8sf3_maskz_1 = 4324,
  CODE_FOR_avx512vl_vpermi2varv4di3 = 4325,
  CODE_FOR_avx512vl_vpermi2varv4di3_maskz_1 = 4326,
  CODE_FOR_avx512vl_vpermi2varv4df3 = 4327,
  CODE_FOR_avx512vl_vpermi2varv4df3_maskz_1 = 4328,
  CODE_FOR_avx512vl_vpermi2varv4si3 = 4329,
  CODE_FOR_avx512vl_vpermi2varv4si3_maskz_1 = 4330,
  CODE_FOR_avx512vl_vpermi2varv4sf3 = 4331,
  CODE_FOR_avx512vl_vpermi2varv4sf3_maskz_1 = 4332,
  CODE_FOR_avx512vl_vpermi2varv2di3 = 4333,
  CODE_FOR_avx512vl_vpermi2varv2di3_maskz_1 = 4334,
  CODE_FOR_avx512vl_vpermi2varv2df3 = 4335,
  CODE_FOR_avx512vl_vpermi2varv2df3_maskz_1 = 4336,
  CODE_FOR_avx512bw_vpermi2varv64qi3 = 4337,
  CODE_FOR_avx512bw_vpermi2varv64qi3_maskz_1 = 4338,
  CODE_FOR_avx512vl_vpermi2varv16qi3 = 4339,
  CODE_FOR_avx512vl_vpermi2varv16qi3_maskz_1 = 4340,
  CODE_FOR_avx512vl_vpermi2varv32qi3 = 4341,
  CODE_FOR_avx512vl_vpermi2varv32qi3_maskz_1 = 4342,
  CODE_FOR_avx512vl_vpermi2varv8hi3 = 4343,
  CODE_FOR_avx512vl_vpermi2varv8hi3_maskz_1 = 4344,
  CODE_FOR_avx512vl_vpermi2varv16hi3 = 4345,
  CODE_FOR_avx512vl_vpermi2varv16hi3_maskz_1 = 4346,
  CODE_FOR_avx512bw_vpermi2varv32hi3 = 4347,
  CODE_FOR_avx512bw_vpermi2varv32hi3_maskz_1 = 4348,
  CODE_FOR_avx512f_vpermi2varv16si3_mask = 4349,
  CODE_FOR_avx512f_vpermi2varv16sf3_mask = 4350,
  CODE_FOR_avx512f_vpermi2varv8di3_mask = 4351,
  CODE_FOR_avx512f_vpermi2varv8df3_mask = 4352,
  CODE_FOR_avx512vl_vpermi2varv8si3_mask = 4353,
  CODE_FOR_avx512vl_vpermi2varv8sf3_mask = 4354,
  CODE_FOR_avx512vl_vpermi2varv4di3_mask = 4355,
  CODE_FOR_avx512vl_vpermi2varv4df3_mask = 4356,
  CODE_FOR_avx512vl_vpermi2varv4si3_mask = 4357,
  CODE_FOR_avx512vl_vpermi2varv4sf3_mask = 4358,
  CODE_FOR_avx512vl_vpermi2varv2di3_mask = 4359,
  CODE_FOR_avx512vl_vpermi2varv2df3_mask = 4360,
  CODE_FOR_avx512bw_vpermi2varv64qi3_mask = 4361,
  CODE_FOR_avx512vl_vpermi2varv16qi3_mask = 4362,
  CODE_FOR_avx512vl_vpermi2varv32qi3_mask = 4363,
  CODE_FOR_avx512vl_vpermi2varv8hi3_mask = 4364,
  CODE_FOR_avx512vl_vpermi2varv16hi3_mask = 4365,
  CODE_FOR_avx512bw_vpermi2varv32hi3_mask = 4366,
  CODE_FOR_avx512f_vpermt2varv16si3 = 4367,
  CODE_FOR_avx512f_vpermt2varv16si3_maskz_1 = 4368,
  CODE_FOR_avx512f_vpermt2varv16sf3 = 4369,
  CODE_FOR_avx512f_vpermt2varv16sf3_maskz_1 = 4370,
  CODE_FOR_avx512f_vpermt2varv8di3 = 4371,
  CODE_FOR_avx512f_vpermt2varv8di3_maskz_1 = 4372,
  CODE_FOR_avx512f_vpermt2varv8df3 = 4373,
  CODE_FOR_avx512f_vpermt2varv8df3_maskz_1 = 4374,
  CODE_FOR_avx512vl_vpermt2varv8si3 = 4375,
  CODE_FOR_avx512vl_vpermt2varv8si3_maskz_1 = 4376,
  CODE_FOR_avx512vl_vpermt2varv8sf3 = 4377,
  CODE_FOR_avx512vl_vpermt2varv8sf3_maskz_1 = 4378,
  CODE_FOR_avx512vl_vpermt2varv4di3 = 4379,
  CODE_FOR_avx512vl_vpermt2varv4di3_maskz_1 = 4380,
  CODE_FOR_avx512vl_vpermt2varv4df3 = 4381,
  CODE_FOR_avx512vl_vpermt2varv4df3_maskz_1 = 4382,
  CODE_FOR_avx512vl_vpermt2varv4si3 = 4383,
  CODE_FOR_avx512vl_vpermt2varv4si3_maskz_1 = 4384,
  CODE_FOR_avx512vl_vpermt2varv4sf3 = 4385,
  CODE_FOR_avx512vl_vpermt2varv4sf3_maskz_1 = 4386,
  CODE_FOR_avx512vl_vpermt2varv2di3 = 4387,
  CODE_FOR_avx512vl_vpermt2varv2di3_maskz_1 = 4388,
  CODE_FOR_avx512vl_vpermt2varv2df3 = 4389,
  CODE_FOR_avx512vl_vpermt2varv2df3_maskz_1 = 4390,
  CODE_FOR_avx512bw_vpermt2varv64qi3 = 4391,
  CODE_FOR_avx512bw_vpermt2varv64qi3_maskz_1 = 4392,
  CODE_FOR_avx512vl_vpermt2varv16qi3 = 4393,
  CODE_FOR_avx512vl_vpermt2varv16qi3_maskz_1 = 4394,
  CODE_FOR_avx512vl_vpermt2varv32qi3 = 4395,
  CODE_FOR_avx512vl_vpermt2varv32qi3_maskz_1 = 4396,
  CODE_FOR_avx512vl_vpermt2varv8hi3 = 4397,
  CODE_FOR_avx512vl_vpermt2varv8hi3_maskz_1 = 4398,
  CODE_FOR_avx512vl_vpermt2varv16hi3 = 4399,
  CODE_FOR_avx512vl_vpermt2varv16hi3_maskz_1 = 4400,
  CODE_FOR_avx512bw_vpermt2varv32hi3 = 4401,
  CODE_FOR_avx512bw_vpermt2varv32hi3_maskz_1 = 4402,
  CODE_FOR_avx512f_vpermt2varv16si3_mask = 4403,
  CODE_FOR_avx512f_vpermt2varv16sf3_mask = 4404,
  CODE_FOR_avx512f_vpermt2varv8di3_mask = 4405,
  CODE_FOR_avx512f_vpermt2varv8df3_mask = 4406,
  CODE_FOR_avx512vl_vpermt2varv8si3_mask = 4407,
  CODE_FOR_avx512vl_vpermt2varv8sf3_mask = 4408,
  CODE_FOR_avx512vl_vpermt2varv4di3_mask = 4409,
  CODE_FOR_avx512vl_vpermt2varv4df3_mask = 4410,
  CODE_FOR_avx512vl_vpermt2varv4si3_mask = 4411,
  CODE_FOR_avx512vl_vpermt2varv4sf3_mask = 4412,
  CODE_FOR_avx512vl_vpermt2varv2di3_mask = 4413,
  CODE_FOR_avx512vl_vpermt2varv2df3_mask = 4414,
  CODE_FOR_avx512bw_vpermt2varv64qi3_mask = 4415,
  CODE_FOR_avx512vl_vpermt2varv16qi3_mask = 4416,
  CODE_FOR_avx512vl_vpermt2varv32qi3_mask = 4417,
  CODE_FOR_avx512vl_vpermt2varv8hi3_mask = 4418,
  CODE_FOR_avx512vl_vpermt2varv16hi3_mask = 4419,
  CODE_FOR_avx512bw_vpermt2varv32hi3_mask = 4420,
  CODE_FOR_vec_set_lo_v4di = 4433,
  CODE_FOR_vec_set_lo_v4di_mask = 4434,
  CODE_FOR_vec_set_lo_v4df = 4435,
  CODE_FOR_vec_set_lo_v4df_mask = 4436,
  CODE_FOR_vec_set_hi_v4di = 4437,
  CODE_FOR_vec_set_hi_v4di_mask = 4438,
  CODE_FOR_vec_set_hi_v4df = 4439,
  CODE_FOR_vec_set_hi_v4df_mask = 4440,
  CODE_FOR_vec_set_lo_v8si = 4441,
  CODE_FOR_vec_set_lo_v8si_mask = 4442,
  CODE_FOR_vec_set_lo_v8sf = 4443,
  CODE_FOR_vec_set_lo_v8sf_mask = 4444,
  CODE_FOR_vec_set_hi_v8si = 4445,
  CODE_FOR_vec_set_hi_v8si_mask = 4446,
  CODE_FOR_vec_set_hi_v8sf = 4447,
  CODE_FOR_vec_set_hi_v8sf_mask = 4448,
  CODE_FOR_vec_set_lo_v16hi = 4449,
  CODE_FOR_vec_set_hi_v16hi = 4450,
  CODE_FOR_vec_set_lo_v32qi = 4451,
  CODE_FOR_vec_set_hi_v32qi = 4452,
  CODE_FOR_avx_maskloadps = 4453,
  CODE_FOR_avx_maskloadpd = 4454,
  CODE_FOR_avx_maskloadps256 = 4455,
  CODE_FOR_avx_maskloadpd256 = 4456,
  CODE_FOR_avx2_maskloadd = 4457,
  CODE_FOR_avx2_maskloadq = 4458,
  CODE_FOR_avx2_maskloadd256 = 4459,
  CODE_FOR_avx2_maskloadq256 = 4460,
  CODE_FOR_avx_maskstoreps = 4461,
  CODE_FOR_avx_maskstorepd = 4462,
  CODE_FOR_avx_maskstoreps256 = 4463,
  CODE_FOR_avx_maskstorepd256 = 4464,
  CODE_FOR_avx2_maskstored = 4465,
  CODE_FOR_avx2_maskstoreq = 4466,
  CODE_FOR_avx2_maskstored256 = 4467,
  CODE_FOR_avx2_maskstoreq256 = 4468,
  CODE_FOR_avx_si256_si = 4469,
  CODE_FOR_avx_ps256_ps = 4470,
  CODE_FOR_avx_pd256_pd = 4471,
  CODE_FOR_avx2_ashrvv4si = 4472,
  CODE_FOR_avx2_ashrvv4si_mask = 4473,
  CODE_FOR_avx2_ashrvv8si = 4474,
  CODE_FOR_avx2_ashrvv8si_mask = 4475,
  CODE_FOR_avx512f_ashrvv16si = 4476,
  CODE_FOR_avx512f_ashrvv16si_mask = 4477,
  CODE_FOR_avx2_ashrvv2di = 4478,
  CODE_FOR_avx2_ashrvv2di_mask = 4479,
  CODE_FOR_avx2_ashrvv4di = 4480,
  CODE_FOR_avx2_ashrvv4di_mask = 4481,
  CODE_FOR_avx512f_ashrvv8di = 4482,
  CODE_FOR_avx512f_ashrvv8di_mask = 4483,
  CODE_FOR_avx512vl_ashrvv8hi = 4484,
  CODE_FOR_avx512vl_ashrvv8hi_mask = 4485,
  CODE_FOR_avx512vl_ashrvv16hi = 4486,
  CODE_FOR_avx512vl_ashrvv16hi_mask = 4487,
  CODE_FOR_avx512bw_ashrvv32hi = 4488,
  CODE_FOR_avx512bw_ashrvv32hi_mask = 4489,
  CODE_FOR_avx512f_ashlvv16si = 4490,
  CODE_FOR_avx512f_ashlvv16si_mask = 4491,
  CODE_FOR_avx512f_lshrvv16si = 4492,
  CODE_FOR_avx512f_lshrvv16si_mask = 4493,
  CODE_FOR_avx2_ashlvv8si = 4494,
  CODE_FOR_avx2_ashlvv8si_mask = 4495,
  CODE_FOR_avx2_lshrvv8si = 4496,
  CODE_FOR_avx2_lshrvv8si_mask = 4497,
  CODE_FOR_avx2_ashlvv4si = 4498,
  CODE_FOR_avx2_ashlvv4si_mask = 4499,
  CODE_FOR_avx2_lshrvv4si = 4500,
  CODE_FOR_avx2_lshrvv4si_mask = 4501,
  CODE_FOR_avx512f_ashlvv8di = 4502,
  CODE_FOR_avx512f_ashlvv8di_mask = 4503,
  CODE_FOR_avx512f_lshrvv8di = 4504,
  CODE_FOR_avx512f_lshrvv8di_mask = 4505,
  CODE_FOR_avx2_ashlvv4di = 4506,
  CODE_FOR_avx2_ashlvv4di_mask = 4507,
  CODE_FOR_avx2_lshrvv4di = 4508,
  CODE_FOR_avx2_lshrvv4di_mask = 4509,
  CODE_FOR_avx2_ashlvv2di = 4510,
  CODE_FOR_avx2_ashlvv2di_mask = 4511,
  CODE_FOR_avx2_lshrvv2di = 4512,
  CODE_FOR_avx2_lshrvv2di_mask = 4513,
  CODE_FOR_avx512vl_ashlvv8hi = 4514,
  CODE_FOR_avx512vl_ashlvv8hi_mask = 4515,
  CODE_FOR_avx512vl_lshrvv8hi = 4516,
  CODE_FOR_avx512vl_lshrvv8hi_mask = 4517,
  CODE_FOR_avx512vl_ashlvv16hi = 4518,
  CODE_FOR_avx512vl_ashlvv16hi_mask = 4519,
  CODE_FOR_avx512vl_lshrvv16hi = 4520,
  CODE_FOR_avx512vl_lshrvv16hi_mask = 4521,
  CODE_FOR_avx512bw_ashlvv32hi = 4522,
  CODE_FOR_avx512bw_ashlvv32hi_mask = 4523,
  CODE_FOR_avx512bw_lshrvv32hi = 4524,
  CODE_FOR_avx512bw_lshrvv32hi_mask = 4525,
  CODE_FOR_avx_vec_concatv32qi = 4526,
  CODE_FOR_avx_vec_concatv16hi = 4527,
  CODE_FOR_avx_vec_concatv8si = 4528,
  CODE_FOR_avx_vec_concatv4di = 4529,
  CODE_FOR_avx_vec_concatv8sf = 4530,
  CODE_FOR_avx_vec_concatv4df = 4531,
  CODE_FOR_avx_vec_concatv64qi = 4532,
  CODE_FOR_avx_vec_concatv32hi = 4533,
  CODE_FOR_avx_vec_concatv16si = 4534,
  CODE_FOR_avx_vec_concatv8di = 4535,
  CODE_FOR_avx_vec_concatv16sf = 4536,
  CODE_FOR_avx_vec_concatv8df = 4537,
  CODE_FOR_vcvtph2ps = 4538,
  CODE_FOR_vcvtph2ps_mask = 4539,
  CODE_FOR_vcvtph2ps256 = 4542,
  CODE_FOR_vcvtph2ps256_mask = 4543,
  CODE_FOR_avx512f_vcvtph2ps512_mask = 4546,
  CODE_FOR_avx512f_vcvtph2ps512_mask_round = 4547,
  CODE_FOR_vcvtps2ph256 = 4551,
  CODE_FOR_vcvtps2ph256_mask = 4552,
  CODE_FOR_avx512f_vcvtps2ph512_mask = 4554,
  CODE_FOR_avx512f_compressv16si_mask = 4771,
  CODE_FOR_avx512f_compressv16sf_mask = 4772,
  CODE_FOR_avx512f_compressv8di_mask = 4773,
  CODE_FOR_avx512f_compressv8df_mask = 4774,
  CODE_FOR_avx512vl_compressv8si_mask = 4775,
  CODE_FOR_avx512vl_compressv8sf_mask = 4776,
  CODE_FOR_avx512vl_compressv4di_mask = 4777,
  CODE_FOR_avx512vl_compressv4df_mask = 4778,
  CODE_FOR_avx512vl_compressv4si_mask = 4779,
  CODE_FOR_avx512vl_compressv4sf_mask = 4780,
  CODE_FOR_avx512vl_compressv2di_mask = 4781,
  CODE_FOR_avx512vl_compressv2df_mask = 4782,
  CODE_FOR_avx512f_compressstorev16si_mask = 4783,
  CODE_FOR_avx512f_compressstorev16sf_mask = 4784,
  CODE_FOR_avx512f_compressstorev8di_mask = 4785,
  CODE_FOR_avx512f_compressstorev8df_mask = 4786,
  CODE_FOR_avx512vl_compressstorev8si_mask = 4787,
  CODE_FOR_avx512vl_compressstorev8sf_mask = 4788,
  CODE_FOR_avx512vl_compressstorev4di_mask = 4789,
  CODE_FOR_avx512vl_compressstorev4df_mask = 4790,
  CODE_FOR_avx512vl_compressstorev4si_mask = 4791,
  CODE_FOR_avx512vl_compressstorev4sf_mask = 4792,
  CODE_FOR_avx512vl_compressstorev2di_mask = 4793,
  CODE_FOR_avx512vl_compressstorev2df_mask = 4794,
  CODE_FOR_avx512f_expandv16si_mask = 4795,
  CODE_FOR_avx512f_expandv16sf_mask = 4796,
  CODE_FOR_avx512f_expandv8di_mask = 4797,
  CODE_FOR_avx512f_expandv8df_mask = 4798,
  CODE_FOR_avx512vl_expandv8si_mask = 4799,
  CODE_FOR_avx512vl_expandv8sf_mask = 4800,
  CODE_FOR_avx512vl_expandv4di_mask = 4801,
  CODE_FOR_avx512vl_expandv4df_mask = 4802,
  CODE_FOR_avx512vl_expandv4si_mask = 4803,
  CODE_FOR_avx512vl_expandv4sf_mask = 4804,
  CODE_FOR_avx512vl_expandv2di_mask = 4805,
  CODE_FOR_avx512vl_expandv2df_mask = 4806,
  CODE_FOR_avx512dq_rangepv16sf = 4807,
  CODE_FOR_avx512dq_rangepv16sf_round = 4808,
  CODE_FOR_avx512dq_rangepv16sf_mask = 4809,
  CODE_FOR_avx512dq_rangepv16sf_mask_round = 4810,
  CODE_FOR_avx512dq_rangepv8sf = 4811,
#define CODE_FOR_avx512dq_rangepv8sf_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv8sf_mask = 4812,
#define CODE_FOR_avx512dq_rangepv8sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv4sf = 4813,
#define CODE_FOR_avx512dq_rangepv4sf_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv4sf_mask = 4814,
#define CODE_FOR_avx512dq_rangepv4sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv8df = 4815,
  CODE_FOR_avx512dq_rangepv8df_round = 4816,
  CODE_FOR_avx512dq_rangepv8df_mask = 4817,
  CODE_FOR_avx512dq_rangepv8df_mask_round = 4818,
  CODE_FOR_avx512dq_rangepv4df = 4819,
#define CODE_FOR_avx512dq_rangepv4df_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv4df_mask = 4820,
#define CODE_FOR_avx512dq_rangepv4df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv2df = 4821,
#define CODE_FOR_avx512dq_rangepv2df_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv2df_mask = 4822,
#define CODE_FOR_avx512dq_rangepv2df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangesv4sf = 4823,
  CODE_FOR_avx512dq_rangesv4sf_round = 4824,
  CODE_FOR_avx512dq_rangesv2df = 4825,
  CODE_FOR_avx512dq_rangesv2df_round = 4826,
  CODE_FOR_avx512dq_fpclassv16sf = 4827,
  CODE_FOR_avx512dq_fpclassv16sf_mask = 4828,
  CODE_FOR_avx512dq_fpclassv8sf = 4829,
  CODE_FOR_avx512dq_fpclassv8sf_mask = 4830,
  CODE_FOR_avx512dq_fpclassv4sf = 4831,
  CODE_FOR_avx512dq_fpclassv4sf_mask = 4832,
  CODE_FOR_avx512dq_fpclassv8df = 4833,
  CODE_FOR_avx512dq_fpclassv8df_mask = 4834,
  CODE_FOR_avx512dq_fpclassv4df = 4835,
  CODE_FOR_avx512dq_fpclassv4df_mask = 4836,
  CODE_FOR_avx512dq_fpclassv2df = 4837,
  CODE_FOR_avx512dq_fpclassv2df_mask = 4838,
  CODE_FOR_avx512dq_vmfpclassv4sf = 4839,
  CODE_FOR_avx512dq_vmfpclassv2df = 4840,
  CODE_FOR_avx512f_getmantv16sf = 4841,
  CODE_FOR_avx512f_getmantv16sf_round = 4842,
  CODE_FOR_avx512f_getmantv16sf_mask = 4843,
  CODE_FOR_avx512f_getmantv16sf_mask_round = 4844,
  CODE_FOR_avx512vl_getmantv8sf = 4845,
  CODE_FOR_avx512vl_getmantv8sf_round = 4846,
  CODE_FOR_avx512vl_getmantv8sf_mask = 4847,
  CODE_FOR_avx512vl_getmantv8sf_mask_round = 4848,
  CODE_FOR_avx512vl_getmantv4sf = 4849,
  CODE_FOR_avx512vl_getmantv4sf_round = 4850,
  CODE_FOR_avx512vl_getmantv4sf_mask = 4851,
  CODE_FOR_avx512vl_getmantv4sf_mask_round = 4852,
  CODE_FOR_avx512f_getmantv8df = 4853,
  CODE_FOR_avx512f_getmantv8df_round = 4854,
  CODE_FOR_avx512f_getmantv8df_mask = 4855,
  CODE_FOR_avx512f_getmantv8df_mask_round = 4856,
  CODE_FOR_avx512vl_getmantv4df = 4857,
  CODE_FOR_avx512vl_getmantv4df_round = 4858,
  CODE_FOR_avx512vl_getmantv4df_mask = 4859,
  CODE_FOR_avx512vl_getmantv4df_mask_round = 4860,
  CODE_FOR_avx512vl_getmantv2df = 4861,
  CODE_FOR_avx512vl_getmantv2df_round = 4862,
  CODE_FOR_avx512vl_getmantv2df_mask = 4863,
  CODE_FOR_avx512vl_getmantv2df_mask_round = 4864,
  CODE_FOR_avx512f_vgetmantv4sf = 4865,
  CODE_FOR_avx512f_vgetmantv4sf_round = 4866,
  CODE_FOR_avx512f_vgetmantv2df = 4867,
  CODE_FOR_avx512f_vgetmantv2df_round = 4868,
  CODE_FOR_avx512bw_dbpsadbwv8hi_mask = 4870,
  CODE_FOR_avx512bw_dbpsadbwv16hi_mask = 4872,
  CODE_FOR_avx512bw_dbpsadbwv32hi_mask = 4874,
  CODE_FOR_clzv16si2 = 4875,
  CODE_FOR_clzv16si2_mask = 4876,
  CODE_FOR_clzv8si2 = 4877,
  CODE_FOR_clzv8si2_mask = 4878,
  CODE_FOR_clzv4si2 = 4879,
  CODE_FOR_clzv4si2_mask = 4880,
  CODE_FOR_clzv8di2 = 4881,
  CODE_FOR_clzv8di2_mask = 4882,
  CODE_FOR_clzv4di2 = 4883,
  CODE_FOR_clzv4di2_mask = 4884,
  CODE_FOR_clzv2di2 = 4885,
  CODE_FOR_clzv2di2_mask = 4886,
  CODE_FOR_conflictv16si_mask = 4888,
  CODE_FOR_conflictv8si_mask = 4890,
  CODE_FOR_conflictv4si_mask = 4892,
  CODE_FOR_conflictv8di_mask = 4894,
  CODE_FOR_conflictv4di_mask = 4896,
  CODE_FOR_conflictv2di_mask = 4898,
  CODE_FOR_sha1msg1 = 4899,
  CODE_FOR_sha1msg2 = 4900,
  CODE_FOR_sha1nexte = 4901,
  CODE_FOR_sha1rnds4 = 4902,
  CODE_FOR_sha256msg1 = 4903,
  CODE_FOR_sha256msg2 = 4904,
  CODE_FOR_sha256rnds2 = 4905,
  CODE_FOR_avx512f_si512_si = 4906,
  CODE_FOR_avx512f_ps512_ps = 4907,
  CODE_FOR_avx512f_pd512_pd = 4908,
  CODE_FOR_avx512f_si512_256si = 4909,
  CODE_FOR_avx512f_ps512_256ps = 4910,
  CODE_FOR_avx512f_pd512_256pd = 4911,
  CODE_FOR_vpamdd52luqv8di = 4912,
  CODE_FOR_vpamdd52luqv8di_maskz_1 = 4913,
  CODE_FOR_vpamdd52huqv8di = 4914,
  CODE_FOR_vpamdd52huqv8di_maskz_1 = 4915,
  CODE_FOR_vpamdd52luqv4di = 4916,
  CODE_FOR_vpamdd52luqv4di_maskz_1 = 4917,
  CODE_FOR_vpamdd52huqv4di = 4918,
  CODE_FOR_vpamdd52huqv4di_maskz_1 = 4919,
  CODE_FOR_vpamdd52luqv2di = 4920,
  CODE_FOR_vpamdd52luqv2di_maskz_1 = 4921,
  CODE_FOR_vpamdd52huqv2di = 4922,
  CODE_FOR_vpamdd52huqv2di_maskz_1 = 4923,
  CODE_FOR_vpamdd52luqv8di_mask = 4924,
  CODE_FOR_vpamdd52huqv8di_mask = 4925,
  CODE_FOR_vpamdd52luqv4di_mask = 4926,
  CODE_FOR_vpamdd52huqv4di_mask = 4927,
  CODE_FOR_vpamdd52luqv2di_mask = 4928,
  CODE_FOR_vpamdd52huqv2di_mask = 4929,
  CODE_FOR_vpmultishiftqbv64qi = 4930,
  CODE_FOR_vpmultishiftqbv64qi_mask = 4931,
  CODE_FOR_vpmultishiftqbv16qi = 4932,
  CODE_FOR_vpmultishiftqbv16qi_mask = 4933,
  CODE_FOR_vpmultishiftqbv32qi = 4934,
  CODE_FOR_vpmultishiftqbv32qi_mask = 4935,
  CODE_FOR_mfence_sse2 = 4938,
  CODE_FOR_mfence_nosse = 4939,
  CODE_FOR_atomic_loaddi_fpu = 4940,
  CODE_FOR_atomic_storeqi_1 = 4941,
  CODE_FOR_atomic_storehi_1 = 4942,
  CODE_FOR_atomic_storesi_1 = 4943,
  CODE_FOR_atomic_storedi_1 = 4944,
  CODE_FOR_atomic_storedi_fpu = 4945,
  CODE_FOR_loaddi_via_fpu = 4946,
  CODE_FOR_storedi_via_fpu = 4947,
  CODE_FOR_atomic_compare_and_swapdi_doubleword = 4948,
  CODE_FOR_atomic_compare_and_swapti_doubleword = 4949,
  CODE_FOR_atomic_compare_and_swapqi_1 = 4950,
  CODE_FOR_atomic_compare_and_swaphi_1 = 4951,
  CODE_FOR_atomic_compare_and_swapsi_1 = 4952,
  CODE_FOR_atomic_compare_and_swapdi_1 = 4953,
  CODE_FOR_atomic_fetch_addqi = 4954,
  CODE_FOR_atomic_fetch_addhi = 4955,
  CODE_FOR_atomic_fetch_addsi = 4956,
  CODE_FOR_atomic_fetch_adddi = 4957,
  CODE_FOR_atomic_exchangeqi = 4962,
  CODE_FOR_atomic_exchangehi = 4963,
  CODE_FOR_atomic_exchangesi = 4964,
  CODE_FOR_atomic_exchangedi = 4965,
  CODE_FOR_atomic_addqi = 4966,
  CODE_FOR_atomic_addhi = 4967,
  CODE_FOR_atomic_addsi = 4968,
  CODE_FOR_atomic_adddi = 4969,
  CODE_FOR_atomic_subqi = 4970,
  CODE_FOR_atomic_subhi = 4971,
  CODE_FOR_atomic_subsi = 4972,
  CODE_FOR_atomic_subdi = 4973,
  CODE_FOR_atomic_andqi = 4974,
  CODE_FOR_atomic_orqi = 4975,
  CODE_FOR_atomic_xorqi = 4976,
  CODE_FOR_atomic_andhi = 4977,
  CODE_FOR_atomic_orhi = 4978,
  CODE_FOR_atomic_xorhi = 4979,
  CODE_FOR_atomic_andsi = 4980,
  CODE_FOR_atomic_orsi = 4981,
  CODE_FOR_atomic_xorsi = 4982,
  CODE_FOR_atomic_anddi = 4983,
  CODE_FOR_atomic_ordi = 4984,
  CODE_FOR_atomic_xordi = 4985,
  CODE_FOR_cbranchqi4 = 4986,
  CODE_FOR_cbranchhi4 = 4987,
  CODE_FOR_cbranchsi4 = 4988,
  CODE_FOR_cbranchdi4 = 4989,
  CODE_FOR_cbranchti4 = 4990,
  CODE_FOR_cstoreqi4 = 4991,
  CODE_FOR_cstorehi4 = 4992,
  CODE_FOR_cstoresi4 = 4993,
  CODE_FOR_cstoredi4 = 4994,
  CODE_FOR_cmpsi_1 = 4995,
  CODE_FOR_cmpdi_1 = 4996,
  CODE_FOR_cmpqi_ext_3 = 4997,
  CODE_FOR_cbranchxf4 = 4998,
  CODE_FOR_cstorexf4 = 4999,
  CODE_FOR_cbranchsf4 = 5000,
  CODE_FOR_cbranchdf4 = 5001,
  CODE_FOR_cstoresf4 = 5002,
  CODE_FOR_cstoredf4 = 5003,
  CODE_FOR_cbranchcc4 = 5004,
  CODE_FOR_cstorecc4 = 5005,
  CODE_FOR_movxi = 5026,
  CODE_FOR_reload_noff_store = 5027,
  CODE_FOR_reload_noff_load = 5028,
  CODE_FOR_movoi = 5029,
  CODE_FOR_movti = 5030,
  CODE_FOR_movcdi = 5031,
  CODE_FOR_movqi = 5032,
  CODE_FOR_movhi = 5033,
  CODE_FOR_movsi = 5034,
  CODE_FOR_movdi = 5035,
  CODE_FOR_movstrictqi = 5038,
  CODE_FOR_movstricthi = 5039,
  CODE_FOR_movtf = 5050,
  CODE_FOR_movsf = 5051,
  CODE_FOR_movdf = 5052,
  CODE_FOR_movxf = 5053,
  CODE_FOR_zero_extendsidi2 = 5060,
  CODE_FOR_zero_extendqisi2 = 5064,
  CODE_FOR_zero_extendhisi2 = 5065,
  CODE_FOR_zero_extendqihi2 = 5068,
  CODE_FOR_extendsidi2 = 5070,
  CODE_FOR_extendsfdf2 = 5081,
  CODE_FOR_extendsfxf2 = 5084,
  CODE_FOR_extenddfxf2 = 5085,
  CODE_FOR_truncdfsf2 = 5086,
  CODE_FOR_truncdfsf2_with_temp = 5089,
  CODE_FOR_truncxfsf2 = 5091,
  CODE_FOR_truncxfdf2 = 5092,
  CODE_FOR_fix_truncxfdi2 = 5097,
  CODE_FOR_fix_truncsfdi2 = 5098,
  CODE_FOR_fix_truncdfdi2 = 5099,
  CODE_FOR_fix_truncxfsi2 = 5100,
  CODE_FOR_fix_truncsfsi2 = 5101,
  CODE_FOR_fix_truncdfsi2 = 5102,
  CODE_FOR_fix_truncsfhi2 = 5103,
  CODE_FOR_fix_truncdfhi2 = 5104,
  CODE_FOR_fix_truncxfhi2 = 5105,
  CODE_FOR_fixuns_truncsfsi2 = 5106,
  CODE_FOR_fixuns_truncdfsi2 = 5107,
  CODE_FOR_fixuns_truncsfhi2 = 5110,
  CODE_FOR_fixuns_truncdfhi2 = 5111,
  CODE_FOR_floatsisf2 = 5134,
  CODE_FOR_floatdisf2 = 5135,
  CODE_FOR_floatsidf2 = 5136,
  CODE_FOR_floatdidf2 = 5137,
  CODE_FOR_floatunsqisf2 = 5152,
  CODE_FOR_floatunshisf2 = 5153,
  CODE_FOR_floatunsqidf2 = 5154,
  CODE_FOR_floatunshidf2 = 5155,
  CODE_FOR_floatunssisf2 = 5159,
  CODE_FOR_floatunssidf2 = 5160,
  CODE_FOR_floatunssixf2 = 5161,
  CODE_FOR_floatunsdisf2 = 5162,
  CODE_FOR_floatunsdidf2 = 5163,
  CODE_FOR_addqi3 = 5166,
  CODE_FOR_addhi3 = 5167,
  CODE_FOR_addsi3 = 5168,
  CODE_FOR_adddi3 = 5169,
  CODE_FOR_addti3 = 5170,
  CODE_FOR_addvqi4 = 5181,
  CODE_FOR_addvhi4 = 5182,
  CODE_FOR_addvsi4 = 5183,
  CODE_FOR_addvdi4 = 5184,
  CODE_FOR_subqi3 = 5190,
  CODE_FOR_subhi3 = 5191,
  CODE_FOR_subsi3 = 5192,
  CODE_FOR_subdi3 = 5193,
  CODE_FOR_subti3 = 5194,
  CODE_FOR_subvqi4 = 5197,
  CODE_FOR_subvhi4 = 5198,
  CODE_FOR_subvsi4 = 5199,
  CODE_FOR_subvdi4 = 5200,
  CODE_FOR_addqi3_cconly_overflow = 5201,
  CODE_FOR_addxf3 = 5202,
  CODE_FOR_subxf3 = 5203,
  CODE_FOR_addsf3 = 5204,
  CODE_FOR_subsf3 = 5205,
  CODE_FOR_adddf3 = 5206,
  CODE_FOR_subdf3 = 5207,
  CODE_FOR_mulhi3 = 5208,
  CODE_FOR_mulsi3 = 5209,
  CODE_FOR_muldi3 = 5210,
  CODE_FOR_mulqi3 = 5211,
  CODE_FOR_mulvsi4 = 5212,
  CODE_FOR_mulvdi4 = 5213,
  CODE_FOR_umulvsi4 = 5214,
  CODE_FOR_umulvdi4 = 5215,
  CODE_FOR_mulvqi4 = 5216,
  CODE_FOR_umulvqi4 = 5217,
  CODE_FOR_mulsidi3 = 5218,
  CODE_FOR_umulsidi3 = 5219,
  CODE_FOR_mulditi3 = 5220,
  CODE_FOR_umulditi3 = 5221,
  CODE_FOR_mulqihi3 = 5222,
  CODE_FOR_umulqihi3 = 5223,
  CODE_FOR_smulsi3_highpart = 5226,
  CODE_FOR_umulsi3_highpart = 5227,
  CODE_FOR_smuldi3_highpart = 5228,
  CODE_FOR_umuldi3_highpart = 5229,
  CODE_FOR_mulxf3 = 5230,
  CODE_FOR_mulsf3 = 5231,
  CODE_FOR_muldf3 = 5232,
  CODE_FOR_divxf3 = 5233,
  CODE_FOR_divdf3 = 5234,
  CODE_FOR_divsf3 = 5235,
  CODE_FOR_divmodhi4 = 5236,
  CODE_FOR_divmodsi4 = 5237,
  CODE_FOR_divmoddi4 = 5238,
  CODE_FOR_divmodqi4 = 5246,
  CODE_FOR_udivmodhi4 = 5247,
  CODE_FOR_udivmodsi4 = 5248,
  CODE_FOR_udivmoddi4 = 5249,
  CODE_FOR_udivmodqi4 = 5259,
  CODE_FOR_testsi_ccno_1 = 5260,
  CODE_FOR_testqi_ccz_1 = 5261,
  CODE_FOR_testdi_ccno_1 = 5262,
  CODE_FOR_testqi_ext_ccno_0 = 5263,
  CODE_FOR_andqi3 = 5279,
  CODE_FOR_andhi3 = 5280,
  CODE_FOR_andsi3 = 5281,
  CODE_FOR_anddi3 = 5282,
  CODE_FOR_iorqi3 = 5294,
  CODE_FOR_xorqi3 = 5295,
  CODE_FOR_iorhi3 = 5296,
  CODE_FOR_xorhi3 = 5297,
  CODE_FOR_iorsi3 = 5298,
  CODE_FOR_xorsi3 = 5299,
  CODE_FOR_iordi3 = 5300,
  CODE_FOR_xordi3 = 5301,
  CODE_FOR_xorqi_cc_ext_1 = 5310,
  CODE_FOR_negqi2 = 5311,
  CODE_FOR_neghi2 = 5312,
  CODE_FOR_negsi2 = 5313,
  CODE_FOR_negdi2 = 5314,
  CODE_FOR_negti2 = 5315,
  CODE_FOR_negvqi3 = 5318,
  CODE_FOR_negvhi3 = 5319,
  CODE_FOR_negvsi3 = 5320,
  CODE_FOR_negvdi3 = 5321,
  CODE_FOR_abssf2 = 5322,
  CODE_FOR_negsf2 = 5323,
  CODE_FOR_absdf2 = 5324,
  CODE_FOR_negdf2 = 5325,
  CODE_FOR_absxf2 = 5326,
  CODE_FOR_negxf2 = 5327,
  CODE_FOR_abstf2 = 5328,
  CODE_FOR_negtf2 = 5329,
  CODE_FOR_copysignsf3 = 5335,
  CODE_FOR_copysigndf3 = 5336,
  CODE_FOR_copysigntf3 = 5337,
  CODE_FOR_one_cmplqi2 = 5344,
  CODE_FOR_one_cmplhi2 = 5345,
  CODE_FOR_one_cmplsi2 = 5346,
  CODE_FOR_one_cmpldi2 = 5347,
  CODE_FOR_ashlqi3 = 5353,
  CODE_FOR_ashlhi3 = 5354,
  CODE_FOR_ashlsi3 = 5355,
  CODE_FOR_ashldi3 = 5356,
  CODE_FOR_ashlti3 = 5357,
  CODE_FOR_x86_shiftsi_adj_1 = 5362,
  CODE_FOR_x86_shiftdi_adj_1 = 5363,
  CODE_FOR_x86_shiftsi_adj_2 = 5364,
  CODE_FOR_x86_shiftdi_adj_2 = 5365,
  CODE_FOR_lshrqi3 = 5371,
  CODE_FOR_ashrqi3 = 5372,
  CODE_FOR_lshrhi3 = 5373,
  CODE_FOR_ashrhi3 = 5374,
  CODE_FOR_lshrsi3 = 5375,
  CODE_FOR_ashrsi3 = 5376,
  CODE_FOR_lshrdi3 = 5377,
  CODE_FOR_ashrdi3 = 5378,
  CODE_FOR_lshrti3 = 5379,
  CODE_FOR_ashrti3 = 5380,
  CODE_FOR_x86_shiftsi_adj_3 = 5389,
  CODE_FOR_x86_shiftdi_adj_3 = 5390,
  CODE_FOR_rotlti3 = 5397,
  CODE_FOR_rotrti3 = 5398,
  CODE_FOR_rotldi3 = 5399,
  CODE_FOR_rotrdi3 = 5400,
  CODE_FOR_rotlqi3 = 5401,
  CODE_FOR_rotrqi3 = 5402,
  CODE_FOR_rotlhi3 = 5403,
  CODE_FOR_rotrhi3 = 5404,
  CODE_FOR_rotlsi3 = 5405,
  CODE_FOR_rotrsi3 = 5406,
  CODE_FOR_extv = 5419,
  CODE_FOR_extzv = 5420,
  CODE_FOR_insv = 5421,
  CODE_FOR_indirect_jump = 5454,
  CODE_FOR_tablejump = 5455,
  CODE_FOR_call = 5460,
  CODE_FOR_sibcall = 5461,
  CODE_FOR_call_pop = 5466,
  CODE_FOR_call_value = 5471,
  CODE_FOR_sibcall_value = 5472,
  CODE_FOR_call_value_pop = 5477,
  CODE_FOR_untyped_call = 5480,
  CODE_FOR_memory_blockage = 5481,
  CODE_FOR_return = 5482,
  CODE_FOR_simple_return = 5483,
  CODE_FOR_prologue = 5484,
  CODE_FOR_epilogue = 5485,
  CODE_FOR_sibcall_epilogue = 5486,
  CODE_FOR_eh_return = 5487,
  CODE_FOR_split_stack_prologue = 5489,
  CODE_FOR_split_stack_space_check = 5490,
  CODE_FOR_ffssi2 = 5491,
  CODE_FOR_ffsdi2 = 5492,
  CODE_FOR_ctzhi2 = 5494,
  CODE_FOR_ctzsi2 = 5495,
  CODE_FOR_ctzdi2 = 5496,
  CODE_FOR_clzhi2 = 5499,
  CODE_FOR_clzsi2 = 5500,
  CODE_FOR_clzdi2 = 5501,
  CODE_FOR_clzhi2_lzcnt = 5502,
  CODE_FOR_clzsi2_lzcnt = 5503,
  CODE_FOR_clzdi2_lzcnt = 5504,
  CODE_FOR_bmi2_bzhi_si3 = 5507,
  CODE_FOR_bmi2_bzhi_di3 = 5508,
  CODE_FOR_popcounthi2 = 5509,
  CODE_FOR_popcountsi2 = 5510,
  CODE_FOR_popcountdi2 = 5511,
  CODE_FOR_bswapdi2 = 5514,
  CODE_FOR_bswapsi2 = 5515,
  CODE_FOR_paritydi2 = 5516,
  CODE_FOR_paritysi2 = 5517,
  CODE_FOR_tls_global_dynamic_32 = 5520,
  CODE_FOR_tls_global_dynamic_64_si = 5521,
  CODE_FOR_tls_global_dynamic_64_di = 5522,
  CODE_FOR_tls_local_dynamic_base_32 = 5523,
  CODE_FOR_tls_local_dynamic_base_64_si = 5524,
  CODE_FOR_tls_local_dynamic_base_64_di = 5525,
  CODE_FOR_tls_dynamic_gnu2_32 = 5527,
  CODE_FOR_tls_dynamic_gnu2_64 = 5529,
  CODE_FOR_rsqrtsf2 = 5531,
  CODE_FOR_sqrtsf2 = 5532,
  CODE_FOR_sqrtdf2 = 5533,
  CODE_FOR_fmodxf3 = 5534,
  CODE_FOR_fmodsf3 = 5535,
  CODE_FOR_fmoddf3 = 5536,
  CODE_FOR_remainderxf3 = 5537,
  CODE_FOR_remaindersf3 = 5538,
  CODE_FOR_remainderdf3 = 5539,
  CODE_FOR_sincossf3 = 5546,
  CODE_FOR_sincosdf3 = 5547,
  CODE_FOR_tanxf2 = 5548,
  CODE_FOR_tansf2 = 5549,
  CODE_FOR_tandf2 = 5550,
  CODE_FOR_atan2xf3 = 5551,
  CODE_FOR_atan2sf3 = 5552,
  CODE_FOR_atan2df3 = 5553,
  CODE_FOR_atanxf2 = 5554,
  CODE_FOR_atansf2 = 5555,
  CODE_FOR_atandf2 = 5556,
  CODE_FOR_asinxf2 = 5557,
  CODE_FOR_asinsf2 = 5558,
  CODE_FOR_asindf2 = 5559,
  CODE_FOR_acosxf2 = 5560,
  CODE_FOR_acossf2 = 5561,
  CODE_FOR_acosdf2 = 5562,
  CODE_FOR_logxf2 = 5563,
  CODE_FOR_logsf2 = 5564,
  CODE_FOR_logdf2 = 5565,
  CODE_FOR_log10xf2 = 5566,
  CODE_FOR_log10sf2 = 5567,
  CODE_FOR_log10df2 = 5568,
  CODE_FOR_log2xf2 = 5569,
  CODE_FOR_log2sf2 = 5570,
  CODE_FOR_log2df2 = 5571,
  CODE_FOR_log1pxf2 = 5572,
  CODE_FOR_log1psf2 = 5573,
  CODE_FOR_log1pdf2 = 5574,
  CODE_FOR_logbxf2 = 5575,
  CODE_FOR_logbsf2 = 5576,
  CODE_FOR_logbdf2 = 5577,
  CODE_FOR_ilogbxf2 = 5578,
  CODE_FOR_ilogbsf2 = 5579,
  CODE_FOR_ilogbdf2 = 5580,
  CODE_FOR_expNcorexf3 = 5581,
  CODE_FOR_expxf2 = 5582,
  CODE_FOR_expsf2 = 5583,
  CODE_FOR_expdf2 = 5584,
  CODE_FOR_exp10xf2 = 5585,
  CODE_FOR_exp10sf2 = 5586,
  CODE_FOR_exp10df2 = 5587,
  CODE_FOR_exp2xf2 = 5588,
  CODE_FOR_exp2sf2 = 5589,
  CODE_FOR_exp2df2 = 5590,
  CODE_FOR_expm1xf2 = 5591,
  CODE_FOR_expm1sf2 = 5592,
  CODE_FOR_expm1df2 = 5593,
  CODE_FOR_ldexpxf3 = 5594,
  CODE_FOR_ldexpsf3 = 5595,
  CODE_FOR_ldexpdf3 = 5596,
  CODE_FOR_scalbxf3 = 5597,
  CODE_FOR_scalbsf3 = 5598,
  CODE_FOR_scalbdf3 = 5599,
  CODE_FOR_significandxf2 = 5600,
  CODE_FOR_significandsf2 = 5601,
  CODE_FOR_significanddf2 = 5602,
  CODE_FOR_rintsf2 = 5603,
  CODE_FOR_rintdf2 = 5604,
  CODE_FOR_roundsf2 = 5605,
  CODE_FOR_rounddf2 = 5606,
  CODE_FOR_roundxf2 = 5607,
  CODE_FOR_lrintxfhi2 = 5617,
  CODE_FOR_lrintxfsi2 = 5618,
  CODE_FOR_lrintxfdi2 = 5619,
  CODE_FOR_lrintsfsi2 = 5620,
  CODE_FOR_lrintsfdi2 = 5621,
  CODE_FOR_lrintdfsi2 = 5622,
  CODE_FOR_lrintdfdi2 = 5623,
  CODE_FOR_lroundsfhi2 = 5624,
  CODE_FOR_lrounddfhi2 = 5625,
  CODE_FOR_lroundxfhi2 = 5626,
  CODE_FOR_lroundsfsi2 = 5627,
  CODE_FOR_lrounddfsi2 = 5628,
  CODE_FOR_lroundxfsi2 = 5629,
  CODE_FOR_lroundsfdi2 = 5630,
  CODE_FOR_lrounddfdi2 = 5631,
  CODE_FOR_lroundxfdi2 = 5632,
  CODE_FOR_floorxf2 = 5636,
  CODE_FOR_ceilxf2 = 5637,
  CODE_FOR_btruncxf2 = 5638,
  CODE_FOR_floorsf2 = 5639,
  CODE_FOR_ceilsf2 = 5640,
  CODE_FOR_btruncsf2 = 5641,
  CODE_FOR_floordf2 = 5642,
  CODE_FOR_ceildf2 = 5643,
  CODE_FOR_btruncdf2 = 5644,
  CODE_FOR_nearbyintxf2 = 5646,
  CODE_FOR_nearbyintsf2 = 5647,
  CODE_FOR_nearbyintdf2 = 5648,
  CODE_FOR_lfloorxfhi2 = 5667,
  CODE_FOR_lceilxfhi2 = 5668,
  CODE_FOR_lfloorxfsi2 = 5669,
  CODE_FOR_lceilxfsi2 = 5670,
  CODE_FOR_lfloorxfdi2 = 5671,
  CODE_FOR_lceilxfdi2 = 5672,
  CODE_FOR_lfloorsfsi2 = 5673,
  CODE_FOR_lceilsfsi2 = 5674,
  CODE_FOR_lfloorsfdi2 = 5675,
  CODE_FOR_lceilsfdi2 = 5676,
  CODE_FOR_lfloordfsi2 = 5677,
  CODE_FOR_lceildfsi2 = 5678,
  CODE_FOR_lfloordfdi2 = 5679,
  CODE_FOR_lceildfdi2 = 5680,
  CODE_FOR_isinfxf2 = 5683,
  CODE_FOR_isinfsf2 = 5684,
  CODE_FOR_isinfdf2 = 5685,
  CODE_FOR_signbitxf2 = 5686,
  CODE_FOR_signbitdf2 = 5687,
  CODE_FOR_signbitsf2 = 5688,
  CODE_FOR_movmemsi = 5689,
  CODE_FOR_movmemdi = 5690,
  CODE_FOR_strmov = 5691,
  CODE_FOR_strmov_singleop = 5692,
  CODE_FOR_rep_mov = 5693,
  CODE_FOR_setmemsi = 5694,
  CODE_FOR_setmemdi = 5695,
  CODE_FOR_strset = 5696,
  CODE_FOR_strset_singleop = 5697,
  CODE_FOR_rep_stos = 5698,
  CODE_FOR_cmpstrnsi = 5699,
  CODE_FOR_cmpintqi = 5700,
  CODE_FOR_cmpstrnqi_nz_1 = 5701,
  CODE_FOR_cmpstrnqi_1 = 5702,
  CODE_FOR_strlensi = 5703,
  CODE_FOR_strlendi = 5704,
  CODE_FOR_strlenqi_1 = 5705,
  CODE_FOR_movqicc = 5708,
  CODE_FOR_movhicc = 5709,
  CODE_FOR_movsicc = 5710,
  CODE_FOR_movdicc = 5711,
  CODE_FOR_x86_movsicc_0_m1 = 5712,
  CODE_FOR_x86_movdicc_0_m1 = 5713,
  CODE_FOR_movsfcc = 5725,
  CODE_FOR_movdfcc = 5726,
  CODE_FOR_movxfcc = 5727,
  CODE_FOR_addqicc = 5736,
  CODE_FOR_addhicc = 5737,
  CODE_FOR_addsicc = 5738,
  CODE_FOR_adddicc = 5739,
  CODE_FOR_allocate_stack = 5740,
  CODE_FOR_probe_stack = 5741,
  CODE_FOR_builtin_setjmp_receiver = 5742,
  CODE_FOR_prefetch = 5849,
  CODE_FOR_stack_protect_set = 5850,
  CODE_FOR_stack_protect_test = 5851,
  CODE_FOR_lwp_llwpcb = 5852,
  CODE_FOR_lwp_slwpcb = 5853,
  CODE_FOR_lwp_lwpvalsi3 = 5854,
  CODE_FOR_lwp_lwpvaldi3 = 5855,
  CODE_FOR_lwp_lwpinssi3 = 5856,
  CODE_FOR_lwp_lwpinsdi3 = 5857,
  CODE_FOR_pause = 5858,
  CODE_FOR_xbegin = 5859,
  CODE_FOR_xtest = 5860,
  CODE_FOR_bnd32_mk = 5861,
  CODE_FOR_bnd64_mk = 5862,
  CODE_FOR_movbnd32 = 5863,
  CODE_FOR_movbnd64 = 5864,
  CODE_FOR_bnd32_cl = 5865,
  CODE_FOR_bnd32_cu = 5866,
  CODE_FOR_bnd32_cn = 5867,
  CODE_FOR_bnd64_cl = 5868,
  CODE_FOR_bnd64_cu = 5869,
  CODE_FOR_bnd64_cn = 5870,
  CODE_FOR_bnd32_ldx = 5871,
  CODE_FOR_bnd64_ldx = 5872,
  CODE_FOR_bnd32_stx = 5873,
  CODE_FOR_bnd64_stx = 5874,
  CODE_FOR_movv8qi = 5875,
  CODE_FOR_movv4hi = 5876,
  CODE_FOR_movv2si = 5877,
  CODE_FOR_movv1di = 5878,
  CODE_FOR_movv2sf = 5879,
  CODE_FOR_movmisalignv8qi = 5885,
  CODE_FOR_movmisalignv4hi = 5886,
  CODE_FOR_movmisalignv2si = 5887,
  CODE_FOR_movmisalignv1di = 5888,
  CODE_FOR_movmisalignv2sf = 5889,
  CODE_FOR_mmx_addv2sf3 = 5890,
  CODE_FOR_mmx_subv2sf3 = 5891,
  CODE_FOR_mmx_subrv2sf3 = 5892,
  CODE_FOR_mmx_mulv2sf3 = 5893,
  CODE_FOR_mmx_smaxv2sf3 = 5894,
  CODE_FOR_mmx_sminv2sf3 = 5895,
  CODE_FOR_mmx_eqv2sf3 = 5896,
  CODE_FOR_vec_setv2sf = 5897,
  CODE_FOR_vec_extractv2sf = 5900,
  CODE_FOR_vec_initv2sf = 5901,
  CODE_FOR_mmx_addv8qi3 = 5902,
  CODE_FOR_mmx_subv8qi3 = 5903,
  CODE_FOR_mmx_addv4hi3 = 5904,
  CODE_FOR_mmx_subv4hi3 = 5905,
  CODE_FOR_mmx_addv2si3 = 5906,
  CODE_FOR_mmx_subv2si3 = 5907,
  CODE_FOR_mmx_addv1di3 = 5908,
  CODE_FOR_mmx_subv1di3 = 5909,
  CODE_FOR_mmx_ssaddv8qi3 = 5910,
  CODE_FOR_mmx_usaddv8qi3 = 5911,
  CODE_FOR_mmx_sssubv8qi3 = 5912,
  CODE_FOR_mmx_ussubv8qi3 = 5913,
  CODE_FOR_mmx_ssaddv4hi3 = 5914,
  CODE_FOR_mmx_usaddv4hi3 = 5915,
  CODE_FOR_mmx_sssubv4hi3 = 5916,
  CODE_FOR_mmx_ussubv4hi3 = 5917,
  CODE_FOR_mmx_mulv4hi3 = 5918,
  CODE_FOR_mmx_smulv4hi3_highpart = 5919,
  CODE_FOR_mmx_umulv4hi3_highpart = 5920,
  CODE_FOR_mmx_pmaddwd = 5921,
  CODE_FOR_mmx_pmulhrwv4hi3 = 5922,
  CODE_FOR_sse2_umulv1siv1di3 = 5923,
  CODE_FOR_mmx_smaxv4hi3 = 5924,
  CODE_FOR_mmx_sminv4hi3 = 5925,
  CODE_FOR_mmx_umaxv8qi3 = 5926,
  CODE_FOR_mmx_uminv8qi3 = 5927,
  CODE_FOR_mmx_eqv8qi3 = 5928,
  CODE_FOR_mmx_eqv4hi3 = 5929,
  CODE_FOR_mmx_eqv2si3 = 5930,
  CODE_FOR_mmx_andv8qi3 = 5931,
  CODE_FOR_mmx_iorv8qi3 = 5932,
  CODE_FOR_mmx_xorv8qi3 = 5933,
  CODE_FOR_mmx_andv4hi3 = 5934,
  CODE_FOR_mmx_iorv4hi3 = 5935,
  CODE_FOR_mmx_xorv4hi3 = 5936,
  CODE_FOR_mmx_andv2si3 = 5937,
  CODE_FOR_mmx_iorv2si3 = 5938,
  CODE_FOR_mmx_xorv2si3 = 5939,
  CODE_FOR_mmx_pinsrw = 5940,
  CODE_FOR_mmx_pshufw = 5941,
  CODE_FOR_vec_setv2si = 5942,
  CODE_FOR_vec_extractv2si = 5946,
  CODE_FOR_vec_initv2si = 5947,
  CODE_FOR_vec_setv4hi = 5948,
  CODE_FOR_vec_extractv4hi = 5949,
  CODE_FOR_vec_initv4hi = 5950,
  CODE_FOR_vec_setv8qi = 5951,
  CODE_FOR_vec_extractv8qi = 5952,
  CODE_FOR_vec_initv8qi = 5953,
  CODE_FOR_mmx_uavgv8qi3 = 5954,
  CODE_FOR_mmx_uavgv4hi3 = 5955,
  CODE_FOR_mmx_maskmovq = 5956,
  CODE_FOR_mmx_emms = 5957,
  CODE_FOR_mmx_femms = 5958,
  CODE_FOR_movv64qi = 5959,
  CODE_FOR_movv32qi = 5960,
  CODE_FOR_movv16qi = 5961,
  CODE_FOR_movv32hi = 5962,
  CODE_FOR_movv16hi = 5963,
  CODE_FOR_movv8hi = 5964,
  CODE_FOR_movv16si = 5965,
  CODE_FOR_movv8si = 5966,
  CODE_FOR_movv4si = 5967,
  CODE_FOR_movv8di = 5968,
  CODE_FOR_movv4di = 5969,
  CODE_FOR_movv2di = 5970,
  CODE_FOR_movv4ti = 5971,
  CODE_FOR_movv2ti = 5972,
  CODE_FOR_movv1ti = 5973,
  CODE_FOR_movv16sf = 5974,
  CODE_FOR_movv8sf = 5975,
  CODE_FOR_movv4sf = 5976,
  CODE_FOR_movv8df = 5977,
  CODE_FOR_movv4df = 5978,
  CODE_FOR_movv2df = 5979,
  CODE_FOR_movmisalignv64qi = 5983,
  CODE_FOR_movmisalignv32qi = 5984,
  CODE_FOR_movmisalignv16qi = 5985,
  CODE_FOR_movmisalignv32hi = 5986,
  CODE_FOR_movmisalignv16hi = 5987,
  CODE_FOR_movmisalignv8hi = 5988,
  CODE_FOR_movmisalignv16si = 5989,
  CODE_FOR_movmisalignv8si = 5990,
  CODE_FOR_movmisalignv4si = 5991,
  CODE_FOR_movmisalignv8di = 5992,
  CODE_FOR_movmisalignv4di = 5993,
  CODE_FOR_movmisalignv2di = 5994,
  CODE_FOR_movmisalignv4ti = 5995,
  CODE_FOR_movmisalignv2ti = 5996,
  CODE_FOR_movmisalignv1ti = 5997,
  CODE_FOR_movmisalignv16sf = 5998,
  CODE_FOR_movmisalignv8sf = 5999,
  CODE_FOR_movmisalignv4sf = 6000,
  CODE_FOR_movmisalignv8df = 6001,
  CODE_FOR_movmisalignv4df = 6002,
  CODE_FOR_movmisalignv2df = 6003,
  CODE_FOR_avx512f_loadups512 = 6004,
  CODE_FOR_avx512f_loadups512_mask = 6005,
  CODE_FOR_avx_loadups256 = 6006,
  CODE_FOR_avx_loadups256_mask = 6007,
  CODE_FOR_sse_loadups = 6008,
  CODE_FOR_sse_loadups_mask = 6009,
  CODE_FOR_avx512f_loadupd512 = 6010,
  CODE_FOR_avx512f_loadupd512_mask = 6011,
  CODE_FOR_avx_loadupd256 = 6012,
  CODE_FOR_avx_loadupd256_mask = 6013,
  CODE_FOR_sse2_loadupd = 6014,
  CODE_FOR_sse2_loadupd_mask = 6015,
  CODE_FOR_avx_loaddquv32qi = 6016,
  CODE_FOR_avx_loaddquv32qi_mask = 6017,
  CODE_FOR_sse2_loaddquv16qi = 6018,
  CODE_FOR_sse2_loaddquv16qi_mask = 6019,
  CODE_FOR_avx512f_loaddquv64qi = 6020,
  CODE_FOR_avx512f_loaddquv64qi_mask = 6021,
  CODE_FOR_avx512bw_loaddquv32hi = 6022,
  CODE_FOR_avx512bw_loaddquv32hi_mask = 6023,
  CODE_FOR_avx512vl_loaddquv8hi = 6024,
  CODE_FOR_avx512vl_loaddquv8hi_mask = 6025,
  CODE_FOR_avx512vl_loaddquv16hi = 6026,
  CODE_FOR_avx512vl_loaddquv16hi_mask = 6027,
  CODE_FOR_avx512f_loaddquv16si = 6028,
  CODE_FOR_avx512f_loaddquv16si_mask = 6029,
  CODE_FOR_avx_loaddquv8si = 6030,
  CODE_FOR_avx_loaddquv8si_mask = 6031,
  CODE_FOR_sse2_loaddquv4si = 6032,
  CODE_FOR_sse2_loaddquv4si_mask = 6033,
  CODE_FOR_avx512f_loaddquv8di = 6034,
  CODE_FOR_avx512f_loaddquv8di_mask = 6035,
  CODE_FOR_avx512vl_loaddquv4di = 6036,
  CODE_FOR_avx512vl_loaddquv4di_mask = 6037,
  CODE_FOR_avx512vl_loaddquv2di = 6038,
  CODE_FOR_avx512vl_loaddquv2di_mask = 6039,
  CODE_FOR_storentdi = 6040,
  CODE_FOR_storentsi = 6041,
  CODE_FOR_storentsf = 6042,
  CODE_FOR_storentdf = 6043,
  CODE_FOR_storentv8di = 6044,
  CODE_FOR_storentv4di = 6045,
  CODE_FOR_storentv2di = 6046,
  CODE_FOR_storentv16sf = 6047,
  CODE_FOR_storentv8sf = 6048,
  CODE_FOR_storentv4sf = 6049,
  CODE_FOR_storentv8df = 6050,
  CODE_FOR_storentv4df = 6051,
  CODE_FOR_storentv2df = 6052,
  CODE_FOR_absv16sf2 = 6053,
  CODE_FOR_negv16sf2 = 6054,
  CODE_FOR_absv8sf2 = 6055,
  CODE_FOR_negv8sf2 = 6056,
  CODE_FOR_absv4sf2 = 6057,
  CODE_FOR_negv4sf2 = 6058,
  CODE_FOR_absv8df2 = 6059,
  CODE_FOR_negv8df2 = 6060,
  CODE_FOR_absv4df2 = 6061,
  CODE_FOR_negv4df2 = 6062,
  CODE_FOR_absv2df2 = 6063,
  CODE_FOR_negv2df2 = 6064,
  CODE_FOR_addv16sf3 = 6071,
  CODE_FOR_addv16sf3_round = 6072,
  CODE_FOR_addv16sf3_mask = 6073,
  CODE_FOR_addv16sf3_mask_round = 6074,
  CODE_FOR_subv16sf3 = 6075,
  CODE_FOR_subv16sf3_round = 6076,
  CODE_FOR_subv16sf3_mask = 6077,
  CODE_FOR_subv16sf3_mask_round = 6078,
  CODE_FOR_addv8sf3 = 6079,
#define CODE_FOR_addv8sf3_round CODE_FOR_nothing
  CODE_FOR_addv8sf3_mask = 6080,
#define CODE_FOR_addv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_subv8sf3 = 6081,
#define CODE_FOR_subv8sf3_round CODE_FOR_nothing
  CODE_FOR_subv8sf3_mask = 6082,
#define CODE_FOR_subv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_addv4sf3 = 6083,
#define CODE_FOR_addv4sf3_round CODE_FOR_nothing
  CODE_FOR_addv4sf3_mask = 6084,
#define CODE_FOR_addv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_subv4sf3 = 6085,
#define CODE_FOR_subv4sf3_round CODE_FOR_nothing
  CODE_FOR_subv4sf3_mask = 6086,
#define CODE_FOR_subv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_addv8df3 = 6087,
  CODE_FOR_addv8df3_round = 6088,
  CODE_FOR_addv8df3_mask = 6089,
  CODE_FOR_addv8df3_mask_round = 6090,
  CODE_FOR_subv8df3 = 6091,
  CODE_FOR_subv8df3_round = 6092,
  CODE_FOR_subv8df3_mask = 6093,
  CODE_FOR_subv8df3_mask_round = 6094,
  CODE_FOR_addv4df3 = 6095,
#define CODE_FOR_addv4df3_round CODE_FOR_nothing
  CODE_FOR_addv4df3_mask = 6096,
#define CODE_FOR_addv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_subv4df3 = 6097,
#define CODE_FOR_subv4df3_round CODE_FOR_nothing
  CODE_FOR_subv4df3_mask = 6098,
#define CODE_FOR_subv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_addv2df3 = 6099,
#define CODE_FOR_addv2df3_round CODE_FOR_nothing
  CODE_FOR_addv2df3_mask = 6100,
#define CODE_FOR_addv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_subv2df3 = 6101,
#define CODE_FOR_subv2df3_round CODE_FOR_nothing
  CODE_FOR_subv2df3_mask = 6102,
#define CODE_FOR_subv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_mulv16sf3 = 6103,
  CODE_FOR_mulv16sf3_round = 6104,
  CODE_FOR_mulv16sf3_mask = 6105,
  CODE_FOR_mulv16sf3_mask_round = 6106,
  CODE_FOR_mulv8sf3 = 6107,
#define CODE_FOR_mulv8sf3_round CODE_FOR_nothing
  CODE_FOR_mulv8sf3_mask = 6108,
#define CODE_FOR_mulv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_mulv4sf3 = 6109,
#define CODE_FOR_mulv4sf3_round CODE_FOR_nothing
  CODE_FOR_mulv4sf3_mask = 6110,
#define CODE_FOR_mulv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_mulv8df3 = 6111,
  CODE_FOR_mulv8df3_round = 6112,
  CODE_FOR_mulv8df3_mask = 6113,
  CODE_FOR_mulv8df3_mask_round = 6114,
  CODE_FOR_mulv4df3 = 6115,
#define CODE_FOR_mulv4df3_round CODE_FOR_nothing
  CODE_FOR_mulv4df3_mask = 6116,
#define CODE_FOR_mulv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_mulv2df3 = 6117,
#define CODE_FOR_mulv2df3_round CODE_FOR_nothing
  CODE_FOR_mulv2df3_mask = 6118,
#define CODE_FOR_mulv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_divv8df3 = 6119,
  CODE_FOR_divv4df3 = 6120,
  CODE_FOR_divv2df3 = 6121,
  CODE_FOR_divv16sf3 = 6122,
  CODE_FOR_divv8sf3 = 6123,
  CODE_FOR_divv4sf3 = 6124,
  CODE_FOR_sqrtv8df2 = 6125,
  CODE_FOR_sqrtv4df2 = 6126,
  CODE_FOR_sqrtv2df2 = 6127,
  CODE_FOR_sqrtv16sf2 = 6128,
  CODE_FOR_sqrtv8sf2 = 6129,
  CODE_FOR_sqrtv4sf2 = 6130,
  CODE_FOR_rsqrtv8sf2 = 6131,
  CODE_FOR_rsqrtv4sf2 = 6132,
  CODE_FOR_smaxv16sf3 = 6133,
  CODE_FOR_smaxv16sf3_round = 6134,
  CODE_FOR_smaxv16sf3_mask = 6135,
  CODE_FOR_smaxv16sf3_mask_round = 6136,
  CODE_FOR_sminv16sf3 = 6137,
  CODE_FOR_sminv16sf3_round = 6138,
  CODE_FOR_sminv16sf3_mask = 6139,
  CODE_FOR_sminv16sf3_mask_round = 6140,
  CODE_FOR_smaxv8sf3 = 6141,
#define CODE_FOR_smaxv8sf3_round CODE_FOR_nothing
  CODE_FOR_smaxv8sf3_mask = 6142,
#define CODE_FOR_smaxv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_sminv8sf3 = 6143,
#define CODE_FOR_sminv8sf3_round CODE_FOR_nothing
  CODE_FOR_sminv8sf3_mask = 6144,
#define CODE_FOR_sminv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_smaxv4sf3 = 6145,
#define CODE_FOR_smaxv4sf3_round CODE_FOR_nothing
  CODE_FOR_smaxv4sf3_mask = 6146,
#define CODE_FOR_smaxv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_sminv4sf3 = 6147,
#define CODE_FOR_sminv4sf3_round CODE_FOR_nothing
  CODE_FOR_sminv4sf3_mask = 6148,
#define CODE_FOR_sminv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_smaxv8df3 = 6149,
  CODE_FOR_smaxv8df3_round = 6150,
  CODE_FOR_smaxv8df3_mask = 6151,
  CODE_FOR_smaxv8df3_mask_round = 6152,
  CODE_FOR_sminv8df3 = 6153,
  CODE_FOR_sminv8df3_round = 6154,
  CODE_FOR_sminv8df3_mask = 6155,
  CODE_FOR_sminv8df3_mask_round = 6156,
  CODE_FOR_smaxv4df3 = 6157,
#define CODE_FOR_smaxv4df3_round CODE_FOR_nothing
  CODE_FOR_smaxv4df3_mask = 6158,
#define CODE_FOR_smaxv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_sminv4df3 = 6159,
#define CODE_FOR_sminv4df3_round CODE_FOR_nothing
  CODE_FOR_sminv4df3_mask = 6160,
#define CODE_FOR_sminv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_smaxv2df3 = 6161,
#define CODE_FOR_smaxv2df3_round CODE_FOR_nothing
  CODE_FOR_smaxv2df3_mask = 6162,
#define CODE_FOR_smaxv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_sminv2df3 = 6163,
#define CODE_FOR_sminv2df3_round CODE_FOR_nothing
  CODE_FOR_sminv2df3_mask = 6164,
#define CODE_FOR_sminv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_sse3_haddv2df3 = 6165,
  CODE_FOR_reduc_splus_v8df = 6166,
  CODE_FOR_reduc_splus_v4df = 6167,
  CODE_FOR_reduc_splus_v2df = 6168,
  CODE_FOR_reduc_splus_v16sf = 6169,
  CODE_FOR_reduc_splus_v8sf = 6170,
  CODE_FOR_reduc_splus_v4sf = 6171,
  CODE_FOR_reduc_smax_v32qi = 6172,
  CODE_FOR_reduc_smin_v32qi = 6173,
  CODE_FOR_reduc_smax_v16hi = 6174,
  CODE_FOR_reduc_smin_v16hi = 6175,
  CODE_FOR_reduc_smax_v8si = 6176,
  CODE_FOR_reduc_smin_v8si = 6177,
  CODE_FOR_reduc_smax_v4di = 6178,
  CODE_FOR_reduc_smin_v4di = 6179,
  CODE_FOR_reduc_smax_v8sf = 6180,
  CODE_FOR_reduc_smin_v8sf = 6181,
  CODE_FOR_reduc_smax_v4df = 6182,
  CODE_FOR_reduc_smin_v4df = 6183,
  CODE_FOR_reduc_smax_v4sf = 6184,
  CODE_FOR_reduc_smin_v4sf = 6185,
  CODE_FOR_reduc_smax_v64qi = 6186,
  CODE_FOR_reduc_smin_v64qi = 6187,
  CODE_FOR_reduc_smax_v32hi = 6188,
  CODE_FOR_reduc_smin_v32hi = 6189,
  CODE_FOR_reduc_smax_v16si = 6190,
  CODE_FOR_reduc_smin_v16si = 6191,
  CODE_FOR_reduc_smax_v8di = 6192,
  CODE_FOR_reduc_smin_v8di = 6193,
  CODE_FOR_reduc_smax_v16sf = 6194,
  CODE_FOR_reduc_smin_v16sf = 6195,
  CODE_FOR_reduc_smax_v8df = 6196,
  CODE_FOR_reduc_smin_v8df = 6197,
  CODE_FOR_reduc_umax_v16si = 6198,
  CODE_FOR_reduc_umin_v16si = 6199,
  CODE_FOR_reduc_umax_v8di = 6200,
  CODE_FOR_reduc_umin_v8di = 6201,
  CODE_FOR_reduc_umax_v32hi = 6202,
  CODE_FOR_reduc_umin_v32hi = 6203,
  CODE_FOR_reduc_umax_v64qi = 6204,
  CODE_FOR_reduc_umin_v64qi = 6205,
  CODE_FOR_reduc_umax_v32qi = 6206,
  CODE_FOR_reduc_umin_v32qi = 6207,
  CODE_FOR_reduc_umax_v16hi = 6208,
  CODE_FOR_reduc_umin_v16hi = 6209,
  CODE_FOR_reduc_umax_v8si = 6210,
  CODE_FOR_reduc_umin_v8si = 6211,
  CODE_FOR_reduc_umax_v4di = 6212,
  CODE_FOR_reduc_umin_v4di = 6213,
  CODE_FOR_reduc_umin_v8hi = 6214,
  CODE_FOR_vcondv64qiv16sf = 6215,
  CODE_FOR_vcondv32hiv16sf = 6216,
  CODE_FOR_vcondv16siv16sf = 6217,
  CODE_FOR_vcondv8div16sf = 6218,
  CODE_FOR_vcondv16sfv16sf = 6219,
  CODE_FOR_vcondv8dfv16sf = 6220,
  CODE_FOR_vcondv64qiv8df = 6221,
  CODE_FOR_vcondv32hiv8df = 6222,
  CODE_FOR_vcondv16siv8df = 6223,
  CODE_FOR_vcondv8div8df = 6224,
  CODE_FOR_vcondv16sfv8df = 6225,
  CODE_FOR_vcondv8dfv8df = 6226,
  CODE_FOR_vcondv32qiv8sf = 6227,
  CODE_FOR_vcondv32qiv4df = 6228,
  CODE_FOR_vcondv16hiv8sf = 6229,
  CODE_FOR_vcondv16hiv4df = 6230,
  CODE_FOR_vcondv8siv8sf = 6231,
  CODE_FOR_vcondv8siv4df = 6232,
  CODE_FOR_vcondv4div8sf = 6233,
  CODE_FOR_vcondv4div4df = 6234,
  CODE_FOR_vcondv8sfv8sf = 6235,
  CODE_FOR_vcondv8sfv4df = 6236,
  CODE_FOR_vcondv4dfv8sf = 6237,
  CODE_FOR_vcondv4dfv4df = 6238,
  CODE_FOR_vcondv16qiv4sf = 6239,
  CODE_FOR_vcondv16qiv2df = 6240,
  CODE_FOR_vcondv8hiv4sf = 6241,
  CODE_FOR_vcondv8hiv2df = 6242,
  CODE_FOR_vcondv4siv4sf = 6243,
  CODE_FOR_vcondv4siv2df = 6244,
  CODE_FOR_vcondv2div4sf = 6245,
  CODE_FOR_vcondv2div2df = 6246,
  CODE_FOR_vcondv4sfv4sf = 6247,
  CODE_FOR_vcondv4sfv2df = 6248,
  CODE_FOR_vcondv2dfv4sf = 6249,
  CODE_FOR_vcondv2dfv2df = 6250,
  CODE_FOR_andv8sf3 = 6251,
  CODE_FOR_andv8sf3_mask = 6252,
  CODE_FOR_iorv8sf3 = 6253,
  CODE_FOR_iorv8sf3_mask = 6254,
  CODE_FOR_xorv8sf3 = 6255,
  CODE_FOR_xorv8sf3_mask = 6256,
  CODE_FOR_andv4sf3 = 6257,
  CODE_FOR_andv4sf3_mask = 6258,
  CODE_FOR_iorv4sf3 = 6259,
  CODE_FOR_iorv4sf3_mask = 6260,
  CODE_FOR_xorv4sf3 = 6261,
  CODE_FOR_xorv4sf3_mask = 6262,
  CODE_FOR_andv4df3 = 6263,
  CODE_FOR_andv4df3_mask = 6264,
  CODE_FOR_iorv4df3 = 6265,
  CODE_FOR_iorv4df3_mask = 6266,
  CODE_FOR_xorv4df3 = 6267,
  CODE_FOR_xorv4df3_mask = 6268,
  CODE_FOR_andv2df3 = 6269,
  CODE_FOR_andv2df3_mask = 6270,
  CODE_FOR_iorv2df3 = 6271,
  CODE_FOR_iorv2df3_mask = 6272,
  CODE_FOR_xorv2df3 = 6273,
  CODE_FOR_xorv2df3_mask = 6274,
  CODE_FOR_andv16sf3 = 6275,
  CODE_FOR_andv16sf3_mask = 6276,
  CODE_FOR_iorv16sf3 = 6277,
  CODE_FOR_iorv16sf3_mask = 6278,
  CODE_FOR_xorv16sf3 = 6279,
  CODE_FOR_xorv16sf3_mask = 6280,
  CODE_FOR_andv8df3 = 6281,
  CODE_FOR_andv8df3_mask = 6282,
  CODE_FOR_iorv8df3 = 6283,
  CODE_FOR_iorv8df3_mask = 6284,
  CODE_FOR_xorv8df3 = 6285,
  CODE_FOR_xorv8df3_mask = 6286,
  CODE_FOR_copysignv16sf3 = 6287,
  CODE_FOR_copysignv8sf3 = 6288,
  CODE_FOR_copysignv4sf3 = 6289,
  CODE_FOR_copysignv8df3 = 6290,
  CODE_FOR_copysignv4df3 = 6291,
  CODE_FOR_copysignv2df3 = 6292,
  CODE_FOR_andtf3 = 6293,
  CODE_FOR_iortf3 = 6294,
  CODE_FOR_xortf3 = 6295,
  CODE_FOR_fmasf4 = 6296,
  CODE_FOR_fmadf4 = 6297,
  CODE_FOR_fmav4sf4 = 6298,
  CODE_FOR_fmav2df4 = 6299,
  CODE_FOR_fmav8sf4 = 6300,
  CODE_FOR_fmav4df4 = 6301,
  CODE_FOR_fmav16sf4 = 6302,
  CODE_FOR_fmav8df4 = 6303,
  CODE_FOR_fmssf4 = 6304,
  CODE_FOR_fmsdf4 = 6305,
  CODE_FOR_fmsv4sf4 = 6306,
  CODE_FOR_fmsv2df4 = 6307,
  CODE_FOR_fmsv8sf4 = 6308,
  CODE_FOR_fmsv4df4 = 6309,
  CODE_FOR_fmsv16sf4 = 6310,
  CODE_FOR_fmsv8df4 = 6311,
  CODE_FOR_fnmasf4 = 6312,
  CODE_FOR_fnmadf4 = 6313,
  CODE_FOR_fnmav4sf4 = 6314,
  CODE_FOR_fnmav2df4 = 6315,
  CODE_FOR_fnmav8sf4 = 6316,
  CODE_FOR_fnmav4df4 = 6317,
  CODE_FOR_fnmav16sf4 = 6318,
  CODE_FOR_fnmav8df4 = 6319,
  CODE_FOR_fnmssf4 = 6320,
  CODE_FOR_fnmsdf4 = 6321,
  CODE_FOR_fnmsv4sf4 = 6322,
  CODE_FOR_fnmsv2df4 = 6323,
  CODE_FOR_fnmsv8sf4 = 6324,
  CODE_FOR_fnmsv4df4 = 6325,
  CODE_FOR_fnmsv16sf4 = 6326,
  CODE_FOR_fnmsv8df4 = 6327,
  CODE_FOR_fma4i_fmadd_sf = 6328,
  CODE_FOR_fma4i_fmadd_df = 6329,
  CODE_FOR_fma4i_fmadd_v4sf = 6330,
  CODE_FOR_fma4i_fmadd_v2df = 6331,
  CODE_FOR_fma4i_fmadd_v8sf = 6332,
  CODE_FOR_fma4i_fmadd_v4df = 6333,
  CODE_FOR_fma4i_fmadd_v16sf = 6334,
  CODE_FOR_fma4i_fmadd_v8df = 6335,
  CODE_FOR_avx512f_fmadd_v16sf_maskz = 6336,
  CODE_FOR_avx512f_fmadd_v16sf_maskz_round = 6337,
  CODE_FOR_avx512vl_fmadd_v8sf_maskz = 6338,
  CODE_FOR_avx512vl_fmadd_v8sf_maskz_round = 6339,
  CODE_FOR_avx512vl_fmadd_v4sf_maskz = 6340,
  CODE_FOR_avx512vl_fmadd_v4sf_maskz_round = 6341,
  CODE_FOR_avx512f_fmadd_v8df_maskz = 6342,
  CODE_FOR_avx512f_fmadd_v8df_maskz_round = 6343,
  CODE_FOR_avx512vl_fmadd_v4df_maskz = 6344,
  CODE_FOR_avx512vl_fmadd_v4df_maskz_round = 6345,
  CODE_FOR_avx512vl_fmadd_v2df_maskz = 6346,
  CODE_FOR_avx512vl_fmadd_v2df_maskz_round = 6347,
  CODE_FOR_fmaddsub_v16sf = 6348,
  CODE_FOR_fmaddsub_v8sf = 6349,
  CODE_FOR_fmaddsub_v4sf = 6350,
  CODE_FOR_fmaddsub_v8df = 6351,
  CODE_FOR_fmaddsub_v4df = 6352,
  CODE_FOR_fmaddsub_v2df = 6353,
  CODE_FOR_avx512f_fmaddsub_v16sf_maskz = 6354,
  CODE_FOR_avx512f_fmaddsub_v16sf_maskz_round = 6355,
  CODE_FOR_avx512vl_fmaddsub_v8sf_maskz = 6356,
  CODE_FOR_avx512vl_fmaddsub_v8sf_maskz_round = 6357,
  CODE_FOR_avx512vl_fmaddsub_v4sf_maskz = 6358,
  CODE_FOR_avx512vl_fmaddsub_v4sf_maskz_round = 6359,
  CODE_FOR_avx512f_fmaddsub_v8df_maskz = 6360,
  CODE_FOR_avx512f_fmaddsub_v8df_maskz_round = 6361,
  CODE_FOR_avx512vl_fmaddsub_v4df_maskz = 6362,
  CODE_FOR_avx512vl_fmaddsub_v4df_maskz_round = 6363,
  CODE_FOR_avx512vl_fmaddsub_v2df_maskz = 6364,
  CODE_FOR_avx512vl_fmaddsub_v2df_maskz_round = 6365,
  CODE_FOR_fmai_vmfmadd_v4sf = 6366,
  CODE_FOR_fmai_vmfmadd_v4sf_round = 6367,
  CODE_FOR_fmai_vmfmadd_v2df = 6368,
  CODE_FOR_fmai_vmfmadd_v2df_round = 6369,
  CODE_FOR_fma4i_vmfmadd_v4sf = 6370,
  CODE_FOR_fma4i_vmfmadd_v2df = 6371,
  CODE_FOR_floatunsv16siv16sf2 = 6372,
  CODE_FOR_floatunsv8siv8sf2 = 6373,
  CODE_FOR_floatunsv4siv4sf2 = 6374,
  CODE_FOR_fixuns_truncv16sfv16si2 = 6375,
  CODE_FOR_fixuns_truncv8sfv8si2 = 6376,
  CODE_FOR_fixuns_truncv4sfv4si2 = 6377,
  CODE_FOR_avx_cvtpd2dq256_2 = 6378,
  CODE_FOR_avx_cvttpd2dq256_2 = 6379,
  CODE_FOR_sse2_cvtpd2ps = 6380,
  CODE_FOR_sse2_cvtpd2ps_mask = 6381,
  CODE_FOR_avx512bw_cvtmask2bv64qi = 6382,
  CODE_FOR_avx512vl_cvtmask2bv16qi = 6383,
  CODE_FOR_avx512vl_cvtmask2bv32qi = 6384,
  CODE_FOR_avx512bw_cvtmask2wv32hi = 6385,
  CODE_FOR_avx512vl_cvtmask2wv16hi = 6386,
  CODE_FOR_avx512vl_cvtmask2wv8hi = 6387,
  CODE_FOR_avx512f_cvtmask2dv16si = 6388,
  CODE_FOR_avx512vl_cvtmask2dv8si = 6389,
  CODE_FOR_avx512vl_cvtmask2dv4si = 6390,
  CODE_FOR_avx512f_cvtmask2qv8di = 6391,
  CODE_FOR_avx512vl_cvtmask2qv4di = 6392,
  CODE_FOR_avx512vl_cvtmask2qv2di = 6393,
  CODE_FOR_vec_unpacks_hi_v4sf = 6394,
  CODE_FOR_vec_unpacks_hi_v8sf = 6395,
  CODE_FOR_vec_unpacks_hi_v16sf = 6396,
  CODE_FOR_vec_unpacks_lo_v4sf = 6397,
  CODE_FOR_vec_unpacks_lo_v8sf = 6398,
  CODE_FOR_vec_unpacks_float_hi_v32hi = 6399,
  CODE_FOR_vec_unpacks_float_hi_v16hi = 6400,
  CODE_FOR_vec_unpacks_float_hi_v8hi = 6401,
  CODE_FOR_vec_unpacks_float_lo_v32hi = 6402,
  CODE_FOR_vec_unpacks_float_lo_v16hi = 6403,
  CODE_FOR_vec_unpacks_float_lo_v8hi = 6404,
  CODE_FOR_vec_unpacku_float_hi_v32hi = 6405,
  CODE_FOR_vec_unpacku_float_hi_v16hi = 6406,
  CODE_FOR_vec_unpacku_float_hi_v8hi = 6407,
  CODE_FOR_vec_unpacku_float_lo_v32hi = 6408,
  CODE_FOR_vec_unpacku_float_lo_v16hi = 6409,
  CODE_FOR_vec_unpacku_float_lo_v8hi = 6410,
  CODE_FOR_vec_unpacks_float_hi_v4si = 6411,
  CODE_FOR_vec_unpacks_float_lo_v4si = 6412,
  CODE_FOR_vec_unpacks_float_hi_v8si = 6413,
  CODE_FOR_vec_unpacks_float_lo_v8si = 6414,
  CODE_FOR_vec_unpacks_float_hi_v16si = 6415,
  CODE_FOR_vec_unpacks_float_lo_v16si = 6416,
  CODE_FOR_vec_unpacku_float_hi_v4si = 6417,
  CODE_FOR_vec_unpacku_float_lo_v4si = 6418,
  CODE_FOR_vec_unpacku_float_hi_v8si = 6419,
  CODE_FOR_vec_unpacku_float_hi_v16si = 6420,
  CODE_FOR_vec_unpacku_float_lo_v8si = 6421,
  CODE_FOR_vec_unpacku_float_lo_v16si = 6422,
  CODE_FOR_vec_pack_trunc_v8df = 6423,
  CODE_FOR_vec_pack_trunc_v4df = 6424,
  CODE_FOR_vec_pack_trunc_v2df = 6425,
  CODE_FOR_vec_pack_sfix_trunc_v8df = 6426,
  CODE_FOR_vec_pack_sfix_trunc_v4df = 6427,
  CODE_FOR_vec_pack_sfix_trunc_v2df = 6428,
  CODE_FOR_vec_pack_ufix_trunc_v8df = 6429,
  CODE_FOR_vec_pack_ufix_trunc_v4df = 6430,
  CODE_FOR_vec_pack_ufix_trunc_v2df = 6431,
  CODE_FOR_vec_pack_sfix_v4df = 6432,
  CODE_FOR_vec_pack_sfix_v2df = 6433,
  CODE_FOR_sse_movhlps_exp = 6434,
  CODE_FOR_sse_movlhps_exp = 6435,
  CODE_FOR_vec_interleave_highv8sf = 6436,
  CODE_FOR_vec_interleave_lowv8sf = 6437,
  CODE_FOR_avx_shufps256 = 6438,
  CODE_FOR_avx_shufps256_mask = 6439,
  CODE_FOR_sse_shufps = 6440,
  CODE_FOR_sse_shufps_mask = 6441,
  CODE_FOR_sse_loadhps_exp = 6442,
  CODE_FOR_sse_loadlps_exp = 6443,
  CODE_FOR_vec_initv16qi = 6444,
  CODE_FOR_vec_initv8hi = 6445,
  CODE_FOR_vec_initv4si = 6446,
  CODE_FOR_vec_initv2di = 6447,
  CODE_FOR_vec_initv4sf = 6448,
  CODE_FOR_vec_initv2df = 6449,
  CODE_FOR_vec_setv32qi = 6452,
  CODE_FOR_vec_setv16qi = 6453,
  CODE_FOR_vec_setv16hi = 6454,
  CODE_FOR_vec_setv8hi = 6455,
  CODE_FOR_vec_setv16si = 6456,
  CODE_FOR_vec_setv8si = 6457,
  CODE_FOR_vec_setv4si = 6458,
  CODE_FOR_vec_setv8di = 6459,
  CODE_FOR_vec_setv4di = 6460,
  CODE_FOR_vec_setv2di = 6461,
  CODE_FOR_vec_setv16sf = 6462,
  CODE_FOR_vec_setv8sf = 6463,
  CODE_FOR_vec_setv4sf = 6464,
  CODE_FOR_vec_setv8df = 6465,
  CODE_FOR_vec_setv4df = 6466,
  CODE_FOR_vec_setv2df = 6467,
  CODE_FOR_avx512dq_vextractf64x2_mask = 6471,
  CODE_FOR_avx512dq_vextracti64x2_mask = 6472,
  CODE_FOR_avx512f_vextractf32x4_mask = 6473,
  CODE_FOR_avx512f_vextracti32x4_mask = 6474,
  CODE_FOR_avx512dq_vextractf32x8_mask = 6475,
  CODE_FOR_avx512dq_vextracti32x8_mask = 6476,
  CODE_FOR_avx512f_vextractf64x4_mask = 6477,
  CODE_FOR_avx512f_vextracti64x4_mask = 6478,
  CODE_FOR_avx512vl_vextractf128v8si = 6481,
  CODE_FOR_avx512vl_vextractf128v8sf = 6482,
  CODE_FOR_avx512vl_vextractf128v4di = 6483,
  CODE_FOR_avx512vl_vextractf128v4df = 6484,
  CODE_FOR_avx_vextractf128v32qi = 6485,
  CODE_FOR_avx_vextractf128v16hi = 6486,
  CODE_FOR_avx_vextractf128v8si = 6487,
  CODE_FOR_avx_vextractf128v4di = 6488,
  CODE_FOR_avx_vextractf128v8sf = 6489,
  CODE_FOR_avx_vextractf128v4df = 6490,
  CODE_FOR_vec_extractv64qi = 6501,
  CODE_FOR_vec_extractv32qi = 6502,
  CODE_FOR_vec_extractv16qi = 6503,
  CODE_FOR_vec_extractv32hi = 6504,
  CODE_FOR_vec_extractv16hi = 6505,
  CODE_FOR_vec_extractv8hi = 6506,
  CODE_FOR_vec_extractv16si = 6507,
  CODE_FOR_vec_extractv8si = 6508,
  CODE_FOR_vec_extractv4si = 6509,
  CODE_FOR_vec_extractv8di = 6510,
  CODE_FOR_vec_extractv4di = 6511,
  CODE_FOR_vec_extractv2di = 6512,
  CODE_FOR_vec_extractv16sf = 6513,
  CODE_FOR_vec_extractv8sf = 6514,
  CODE_FOR_vec_extractv4sf = 6515,
  CODE_FOR_vec_extractv8df = 6516,
  CODE_FOR_vec_extractv4df = 6517,
  CODE_FOR_vec_extractv2df = 6518,
  CODE_FOR_vec_interleave_highv4df = 6519,
  CODE_FOR_vec_interleave_highv2df = 6520,
  CODE_FOR_avx512f_movddup512 = 6521,
  CODE_FOR_avx512f_movddup512_mask = 6522,
  CODE_FOR_avx512f_unpcklpd512 = 6523,
  CODE_FOR_avx512f_unpcklpd512_mask = 6524,
  CODE_FOR_avx_movddup256 = 6525,
  CODE_FOR_avx_movddup256_mask = 6526,
  CODE_FOR_avx_unpcklpd256 = 6527,
  CODE_FOR_avx_unpcklpd256_mask = 6528,
  CODE_FOR_vec_interleave_lowv4df = 6529,
  CODE_FOR_vec_interleave_lowv2df = 6530,
  CODE_FOR_avx512f_vternlogv16si_maskz = 6533,
  CODE_FOR_avx512vl_vternlogv8si_maskz = 6534,
  CODE_FOR_avx512vl_vternlogv4si_maskz = 6535,
  CODE_FOR_avx512f_vternlogv8di_maskz = 6536,
  CODE_FOR_avx512vl_vternlogv4di_maskz = 6537,
  CODE_FOR_avx512vl_vternlogv2di_maskz = 6538,
  CODE_FOR_avx512f_shufps512_mask = 6539,
  CODE_FOR_avx512f_fixupimmv16sf_maskz = 6540,
  CODE_FOR_avx512f_fixupimmv16sf_maskz_round = 6541,
  CODE_FOR_avx512vl_fixupimmv8sf_maskz = 6542,
  CODE_FOR_avx512vl_fixupimmv8sf_maskz_round = 6543,
  CODE_FOR_avx512vl_fixupimmv4sf_maskz = 6544,
  CODE_FOR_avx512vl_fixupimmv4sf_maskz_round = 6545,
  CODE_FOR_avx512f_fixupimmv8df_maskz = 6546,
  CODE_FOR_avx512f_fixupimmv8df_maskz_round = 6547,
  CODE_FOR_avx512vl_fixupimmv4df_maskz = 6548,
  CODE_FOR_avx512vl_fixupimmv4df_maskz_round = 6549,
  CODE_FOR_avx512vl_fixupimmv2df_maskz = 6550,
  CODE_FOR_avx512vl_fixupimmv2df_maskz_round = 6551,
  CODE_FOR_avx512f_sfixupimmv4sf_maskz = 6552,
  CODE_FOR_avx512f_sfixupimmv4sf_maskz_round = 6553,
  CODE_FOR_avx512f_sfixupimmv2df_maskz = 6554,
  CODE_FOR_avx512f_sfixupimmv2df_maskz_round = 6555,
  CODE_FOR_avx512f_shufpd512_mask = 6556,
  CODE_FOR_avx_shufpd256 = 6557,
  CODE_FOR_avx_shufpd256_mask = 6558,
  CODE_FOR_sse2_shufpd = 6559,
  CODE_FOR_sse2_shufpd_mask = 6560,
  CODE_FOR_sse2_loadhpd_exp = 6563,
  CODE_FOR_sse2_loadlpd_exp = 6565,
  CODE_FOR_avx512f_ss_truncatev16siv16qi2_mask_store = 6567,
  CODE_FOR_avx512f_truncatev16siv16qi2_mask_store = 6568,
  CODE_FOR_avx512f_us_truncatev16siv16qi2_mask_store = 6569,
  CODE_FOR_avx512f_ss_truncatev16siv16hi2_mask_store = 6570,
  CODE_FOR_avx512f_truncatev16siv16hi2_mask_store = 6571,
  CODE_FOR_avx512f_us_truncatev16siv16hi2_mask_store = 6572,
  CODE_FOR_avx512f_ss_truncatev8div8si2_mask_store = 6573,
  CODE_FOR_avx512f_truncatev8div8si2_mask_store = 6574,
  CODE_FOR_avx512f_us_truncatev8div8si2_mask_store = 6575,
  CODE_FOR_avx512f_ss_truncatev8div8hi2_mask_store = 6576,
  CODE_FOR_avx512f_truncatev8div8hi2_mask_store = 6577,
  CODE_FOR_avx512f_us_truncatev8div8hi2_mask_store = 6578,
  CODE_FOR_avx512bw_ss_truncatev32hiv32qi2_mask_store = 6579,
  CODE_FOR_avx512bw_truncatev32hiv32qi2_mask_store = 6580,
  CODE_FOR_avx512bw_us_truncatev32hiv32qi2_mask_store = 6581,
  CODE_FOR_avx512vl_ss_truncatev4div4si2_mask_store = 6582,
  CODE_FOR_avx512vl_truncatev4div4si2_mask_store = 6583,
  CODE_FOR_avx512vl_us_truncatev4div4si2_mask_store = 6584,
  CODE_FOR_avx512vl_ss_truncatev8siv8hi2_mask_store = 6585,
  CODE_FOR_avx512vl_truncatev8siv8hi2_mask_store = 6586,
  CODE_FOR_avx512vl_us_truncatev8siv8hi2_mask_store = 6587,
  CODE_FOR_avx512vl_ss_truncatev16hiv16qi2_mask_store = 6588,
  CODE_FOR_avx512vl_truncatev16hiv16qi2_mask_store = 6589,
  CODE_FOR_avx512vl_us_truncatev16hiv16qi2_mask_store = 6590,
  CODE_FOR_negv64qi2 = 6591,
  CODE_FOR_negv32qi2 = 6592,
  CODE_FOR_negv16qi2 = 6593,
  CODE_FOR_negv32hi2 = 6594,
  CODE_FOR_negv16hi2 = 6595,
  CODE_FOR_negv8hi2 = 6596,
  CODE_FOR_negv16si2 = 6597,
  CODE_FOR_negv8si2 = 6598,
  CODE_FOR_negv4si2 = 6599,
  CODE_FOR_negv8di2 = 6600,
  CODE_FOR_negv4di2 = 6601,
  CODE_FOR_negv2di2 = 6602,
  CODE_FOR_addv64qi3 = 6603,
  CODE_FOR_subv64qi3 = 6604,
  CODE_FOR_addv32qi3 = 6605,
  CODE_FOR_subv32qi3 = 6606,
  CODE_FOR_addv16qi3 = 6607,
  CODE_FOR_subv16qi3 = 6608,
  CODE_FOR_addv32hi3 = 6609,
  CODE_FOR_subv32hi3 = 6610,
  CODE_FOR_addv16hi3 = 6611,
  CODE_FOR_subv16hi3 = 6612,
  CODE_FOR_addv8hi3 = 6613,
  CODE_FOR_subv8hi3 = 6614,
  CODE_FOR_addv16si3 = 6615,
  CODE_FOR_subv16si3 = 6616,
  CODE_FOR_addv8si3 = 6617,
  CODE_FOR_subv8si3 = 6618,
  CODE_FOR_addv4si3 = 6619,
  CODE_FOR_subv4si3 = 6620,
  CODE_FOR_addv8di3 = 6621,
  CODE_FOR_subv8di3 = 6622,
  CODE_FOR_addv4di3 = 6623,
  CODE_FOR_subv4di3 = 6624,
  CODE_FOR_addv2di3 = 6625,
  CODE_FOR_subv2di3 = 6626,
  CODE_FOR_addv16si3_mask = 6627,
  CODE_FOR_subv16si3_mask = 6628,
  CODE_FOR_addv8si3_mask = 6629,
  CODE_FOR_subv8si3_mask = 6630,
  CODE_FOR_addv4si3_mask = 6631,
  CODE_FOR_subv4si3_mask = 6632,
  CODE_FOR_addv8di3_mask = 6633,
  CODE_FOR_subv8di3_mask = 6634,
  CODE_FOR_addv4di3_mask = 6635,
  CODE_FOR_subv4di3_mask = 6636,
  CODE_FOR_addv2di3_mask = 6637,
  CODE_FOR_subv2di3_mask = 6638,
  CODE_FOR_addv64qi3_mask = 6639,
  CODE_FOR_subv64qi3_mask = 6640,
  CODE_FOR_addv16qi3_mask = 6641,
  CODE_FOR_subv16qi3_mask = 6642,
  CODE_FOR_addv32qi3_mask = 6643,
  CODE_FOR_subv32qi3_mask = 6644,
  CODE_FOR_addv32hi3_mask = 6645,
  CODE_FOR_subv32hi3_mask = 6646,
  CODE_FOR_addv16hi3_mask = 6647,
  CODE_FOR_subv16hi3_mask = 6648,
  CODE_FOR_addv8hi3_mask = 6649,
  CODE_FOR_subv8hi3_mask = 6650,
  CODE_FOR_avx512bw_ssaddv64qi3 = 6651,
  CODE_FOR_avx512bw_ssaddv64qi3_mask = 6652,
  CODE_FOR_avx512bw_usaddv64qi3 = 6653,
  CODE_FOR_avx512bw_usaddv64qi3_mask = 6654,
  CODE_FOR_avx512bw_sssubv64qi3 = 6655,
  CODE_FOR_avx512bw_sssubv64qi3_mask = 6656,
  CODE_FOR_avx512bw_ussubv64qi3 = 6657,
  CODE_FOR_avx512bw_ussubv64qi3_mask = 6658,
  CODE_FOR_avx2_ssaddv32qi3 = 6659,
  CODE_FOR_avx2_ssaddv32qi3_mask = 6660,
  CODE_FOR_avx2_usaddv32qi3 = 6661,
  CODE_FOR_avx2_usaddv32qi3_mask = 6662,
  CODE_FOR_avx2_sssubv32qi3 = 6663,
  CODE_FOR_avx2_sssubv32qi3_mask = 6664,
  CODE_FOR_avx2_ussubv32qi3 = 6665,
  CODE_FOR_avx2_ussubv32qi3_mask = 6666,
  CODE_FOR_sse2_ssaddv16qi3 = 6667,
  CODE_FOR_sse2_ssaddv16qi3_mask = 6668,
  CODE_FOR_sse2_usaddv16qi3 = 6669,
  CODE_FOR_sse2_usaddv16qi3_mask = 6670,
  CODE_FOR_sse2_sssubv16qi3 = 6671,
  CODE_FOR_sse2_sssubv16qi3_mask = 6672,
  CODE_FOR_sse2_ussubv16qi3 = 6673,
  CODE_FOR_sse2_ussubv16qi3_mask = 6674,
  CODE_FOR_avx512bw_ssaddv32hi3 = 6675,
  CODE_FOR_avx512bw_ssaddv32hi3_mask = 6676,
  CODE_FOR_avx512bw_usaddv32hi3 = 6677,
  CODE_FOR_avx512bw_usaddv32hi3_mask = 6678,
  CODE_FOR_avx512bw_sssubv32hi3 = 6679,
  CODE_FOR_avx512bw_sssubv32hi3_mask = 6680,
  CODE_FOR_avx512bw_ussubv32hi3 = 6681,
  CODE_FOR_avx512bw_ussubv32hi3_mask = 6682,
  CODE_FOR_avx2_ssaddv16hi3 = 6683,
  CODE_FOR_avx2_ssaddv16hi3_mask = 6684,
  CODE_FOR_avx2_usaddv16hi3 = 6685,
  CODE_FOR_avx2_usaddv16hi3_mask = 6686,
  CODE_FOR_avx2_sssubv16hi3 = 6687,
  CODE_FOR_avx2_sssubv16hi3_mask = 6688,
  CODE_FOR_avx2_ussubv16hi3 = 6689,
  CODE_FOR_avx2_ussubv16hi3_mask = 6690,
  CODE_FOR_sse2_ssaddv8hi3 = 6691,
  CODE_FOR_sse2_ssaddv8hi3_mask = 6692,
  CODE_FOR_sse2_usaddv8hi3 = 6693,
  CODE_FOR_sse2_usaddv8hi3_mask = 6694,
  CODE_FOR_sse2_sssubv8hi3 = 6695,
  CODE_FOR_sse2_sssubv8hi3_mask = 6696,
  CODE_FOR_sse2_ussubv8hi3 = 6697,
  CODE_FOR_sse2_ussubv8hi3_mask = 6698,
  CODE_FOR_mulv64qi3 = 6699,
  CODE_FOR_mulv64qi3_mask = 6700,
  CODE_FOR_mulv32qi3 = 6701,
  CODE_FOR_mulv32qi3_mask = 6702,
  CODE_FOR_mulv16qi3 = 6703,
  CODE_FOR_mulv16qi3_mask = 6704,
  CODE_FOR_mulv32hi3 = 6705,
  CODE_FOR_mulv32hi3_mask = 6706,
  CODE_FOR_mulv16hi3 = 6707,
  CODE_FOR_mulv16hi3_mask = 6708,
  CODE_FOR_mulv8hi3 = 6709,
  CODE_FOR_mulv8hi3_mask = 6710,
  CODE_FOR_smulv32hi3_highpart = 6711,
  CODE_FOR_smulv32hi3_highpart_mask = 6712,
  CODE_FOR_umulv32hi3_highpart = 6713,
  CODE_FOR_umulv32hi3_highpart_mask = 6714,
  CODE_FOR_smulv16hi3_highpart = 6715,
  CODE_FOR_smulv16hi3_highpart_mask = 6716,
  CODE_FOR_umulv16hi3_highpart = 6717,
  CODE_FOR_umulv16hi3_highpart_mask = 6718,
  CODE_FOR_smulv8hi3_highpart = 6719,
  CODE_FOR_smulv8hi3_highpart_mask = 6720,
  CODE_FOR_umulv8hi3_highpart = 6721,
  CODE_FOR_umulv8hi3_highpart_mask = 6722,
  CODE_FOR_vec_widen_umult_even_v16si = 6723,
  CODE_FOR_vec_widen_umult_even_v16si_mask = 6724,
  CODE_FOR_vec_widen_umult_even_v8si = 6725,
  CODE_FOR_vec_widen_umult_even_v8si_mask = 6726,
  CODE_FOR_vec_widen_umult_even_v4si = 6727,
  CODE_FOR_vec_widen_umult_even_v4si_mask = 6728,
  CODE_FOR_vec_widen_smult_even_v16si = 6729,
  CODE_FOR_vec_widen_smult_even_v16si_mask = 6730,
  CODE_FOR_vec_widen_smult_even_v8si = 6731,
  CODE_FOR_vec_widen_smult_even_v8si_mask = 6732,
  CODE_FOR_sse4_1_mulv2siv2di3 = 6733,
  CODE_FOR_sse4_1_mulv2siv2di3_mask = 6734,
  CODE_FOR_avx2_pmaddwd = 6735,
  CODE_FOR_sse2_pmaddwd = 6736,
  CODE_FOR_mulv16si3 = 6737,
  CODE_FOR_mulv16si3_mask = 6738,
  CODE_FOR_mulv8si3 = 6739,
  CODE_FOR_mulv8si3_mask = 6740,
  CODE_FOR_mulv4si3 = 6741,
  CODE_FOR_mulv4si3_mask = 6742,
  CODE_FOR_mulv8di3 = 6743,
  CODE_FOR_mulv4di3 = 6744,
  CODE_FOR_mulv2di3 = 6745,
  CODE_FOR_vec_widen_smult_hi_v32qi = 6746,
  CODE_FOR_vec_widen_umult_hi_v32qi = 6747,
  CODE_FOR_vec_widen_smult_hi_v16qi = 6748,
  CODE_FOR_vec_widen_umult_hi_v16qi = 6749,
  CODE_FOR_vec_widen_smult_hi_v16hi = 6750,
  CODE_FOR_vec_widen_umult_hi_v16hi = 6751,
  CODE_FOR_vec_widen_smult_hi_v8hi = 6752,
  CODE_FOR_vec_widen_umult_hi_v8hi = 6753,
  CODE_FOR_vec_widen_smult_hi_v8si = 6754,
  CODE_FOR_vec_widen_umult_hi_v8si = 6755,
  CODE_FOR_vec_widen_smult_hi_v4si = 6756,
  CODE_FOR_vec_widen_umult_hi_v4si = 6757,
  CODE_FOR_vec_widen_smult_lo_v32qi = 6758,
  CODE_FOR_vec_widen_umult_lo_v32qi = 6759,
  CODE_FOR_vec_widen_smult_lo_v16qi = 6760,
  CODE_FOR_vec_widen_umult_lo_v16qi = 6761,
  CODE_FOR_vec_widen_smult_lo_v16hi = 6762,
  CODE_FOR_vec_widen_umult_lo_v16hi = 6763,
  CODE_FOR_vec_widen_smult_lo_v8hi = 6764,
  CODE_FOR_vec_widen_umult_lo_v8hi = 6765,
  CODE_FOR_vec_widen_smult_lo_v8si = 6766,
  CODE_FOR_vec_widen_umult_lo_v8si = 6767,
  CODE_FOR_vec_widen_smult_lo_v4si = 6768,
  CODE_FOR_vec_widen_umult_lo_v4si = 6769,
  CODE_FOR_vec_widen_smult_even_v4si = 6770,
  CODE_FOR_vec_widen_smult_odd_v16si = 6771,
  CODE_FOR_vec_widen_umult_odd_v16si = 6772,
  CODE_FOR_vec_widen_smult_odd_v8si = 6773,
  CODE_FOR_vec_widen_umult_odd_v8si = 6774,
  CODE_FOR_vec_widen_smult_odd_v4si = 6775,
  CODE_FOR_vec_widen_umult_odd_v4si = 6776,
  CODE_FOR_sdot_prodv32hi = 6777,
  CODE_FOR_sdot_prodv16hi = 6778,
  CODE_FOR_sdot_prodv8hi = 6779,
  CODE_FOR_sdot_prodv4si = 6780,
  CODE_FOR_usadv16qi = 6781,
  CODE_FOR_usadv32qi = 6782,
  CODE_FOR_vec_shl_v16qi = 6783,
  CODE_FOR_vec_shl_v8hi = 6784,
  CODE_FOR_vec_shl_v4si = 6785,
  CODE_FOR_vec_shl_v2di = 6786,
  CODE_FOR_vec_shr_v16qi = 6787,
  CODE_FOR_vec_shr_v8hi = 6788,
  CODE_FOR_vec_shr_v4si = 6789,
  CODE_FOR_vec_shr_v2di = 6790,
  CODE_FOR_smaxv32qi3 = 6791,
  CODE_FOR_sminv32qi3 = 6792,
  CODE_FOR_umaxv32qi3 = 6793,
  CODE_FOR_uminv32qi3 = 6794,
  CODE_FOR_smaxv16hi3 = 6795,
  CODE_FOR_sminv16hi3 = 6796,
  CODE_FOR_umaxv16hi3 = 6797,
  CODE_FOR_uminv16hi3 = 6798,
  CODE_FOR_smaxv8si3 = 6799,
  CODE_FOR_sminv8si3 = 6800,
  CODE_FOR_umaxv8si3 = 6801,
  CODE_FOR_uminv8si3 = 6802,
  CODE_FOR_smaxv64qi3 = 6803,
  CODE_FOR_sminv64qi3 = 6804,
  CODE_FOR_umaxv64qi3 = 6805,
  CODE_FOR_uminv64qi3 = 6806,
  CODE_FOR_smaxv32hi3 = 6807,
  CODE_FOR_sminv32hi3 = 6808,
  CODE_FOR_umaxv32hi3 = 6809,
  CODE_FOR_uminv32hi3 = 6810,
  CODE_FOR_smaxv16si3 = 6811,
  CODE_FOR_sminv16si3 = 6812,
  CODE_FOR_umaxv16si3 = 6813,
  CODE_FOR_uminv16si3 = 6814,
  CODE_FOR_smaxv16si3_mask = 6815,
  CODE_FOR_sminv16si3_mask = 6816,
  CODE_FOR_umaxv16si3_mask = 6817,
  CODE_FOR_uminv16si3_mask = 6818,
  CODE_FOR_smaxv8si3_mask = 6819,
  CODE_FOR_sminv8si3_mask = 6820,
  CODE_FOR_umaxv8si3_mask = 6821,
  CODE_FOR_uminv8si3_mask = 6822,
  CODE_FOR_smaxv4si3_mask = 6823,
  CODE_FOR_sminv4si3_mask = 6824,
  CODE_FOR_umaxv4si3_mask = 6825,
  CODE_FOR_uminv4si3_mask = 6826,
  CODE_FOR_smaxv8di3_mask = 6827,
  CODE_FOR_sminv8di3_mask = 6828,
  CODE_FOR_umaxv8di3_mask = 6829,
  CODE_FOR_uminv8di3_mask = 6830,
  CODE_FOR_smaxv4di3_mask = 6831,
  CODE_FOR_sminv4di3_mask = 6832,
  CODE_FOR_umaxv4di3_mask = 6833,
  CODE_FOR_uminv4di3_mask = 6834,
  CODE_FOR_smaxv2di3_mask = 6835,
  CODE_FOR_sminv2di3_mask = 6836,
  CODE_FOR_umaxv2di3_mask = 6837,
  CODE_FOR_uminv2di3_mask = 6838,
  CODE_FOR_smaxv8di3 = 6839,
  CODE_FOR_sminv8di3 = 6840,
  CODE_FOR_umaxv8di3 = 6841,
  CODE_FOR_uminv8di3 = 6842,
  CODE_FOR_smaxv4di3 = 6843,
  CODE_FOR_sminv4di3 = 6844,
  CODE_FOR_umaxv4di3 = 6845,
  CODE_FOR_uminv4di3 = 6846,
  CODE_FOR_smaxv2di3 = 6847,
  CODE_FOR_sminv2di3 = 6848,
  CODE_FOR_umaxv2di3 = 6849,
  CODE_FOR_uminv2di3 = 6850,
  CODE_FOR_smaxv16qi3 = 6851,
  CODE_FOR_sminv16qi3 = 6852,
  CODE_FOR_smaxv8hi3 = 6853,
  CODE_FOR_sminv8hi3 = 6854,
  CODE_FOR_smaxv4si3 = 6855,
  CODE_FOR_sminv4si3 = 6856,
  CODE_FOR_umaxv16qi3 = 6857,
  CODE_FOR_uminv16qi3 = 6858,
  CODE_FOR_umaxv8hi3 = 6859,
  CODE_FOR_uminv8hi3 = 6860,
  CODE_FOR_umaxv4si3 = 6861,
  CODE_FOR_uminv4si3 = 6862,
  CODE_FOR_avx2_eqv32qi3 = 6863,
  CODE_FOR_avx2_eqv16hi3 = 6864,
  CODE_FOR_avx2_eqv8si3 = 6865,
  CODE_FOR_avx2_eqv4di3 = 6866,
  CODE_FOR_avx512bw_eqv64qi3 = 6867,
  CODE_FOR_avx512bw_eqv64qi3_mask = 6868,
  CODE_FOR_avx512vl_eqv16qi3 = 6869,
  CODE_FOR_avx512vl_eqv16qi3_mask = 6870,
  CODE_FOR_avx512vl_eqv32qi3 = 6871,
  CODE_FOR_avx512vl_eqv32qi3_mask = 6872,
  CODE_FOR_avx512bw_eqv32hi3 = 6873,
  CODE_FOR_avx512bw_eqv32hi3_mask = 6874,
  CODE_FOR_avx512vl_eqv16hi3 = 6875,
  CODE_FOR_avx512vl_eqv16hi3_mask = 6876,
  CODE_FOR_avx512vl_eqv8hi3 = 6877,
  CODE_FOR_avx512vl_eqv8hi3_mask = 6878,
  CODE_FOR_avx512f_eqv16si3 = 6879,
  CODE_FOR_avx512f_eqv16si3_mask = 6880,
  CODE_FOR_avx512vl_eqv8si3 = 6881,
  CODE_FOR_avx512vl_eqv8si3_mask = 6882,
  CODE_FOR_avx512vl_eqv4si3 = 6883,
  CODE_FOR_avx512vl_eqv4si3_mask = 6884,
  CODE_FOR_avx512f_eqv8di3 = 6885,
  CODE_FOR_avx512f_eqv8di3_mask = 6886,
  CODE_FOR_avx512vl_eqv4di3 = 6887,
  CODE_FOR_avx512vl_eqv4di3_mask = 6888,
  CODE_FOR_avx512vl_eqv2di3 = 6889,
  CODE_FOR_avx512vl_eqv2di3_mask = 6890,
  CODE_FOR_sse2_eqv16qi3 = 6891,
  CODE_FOR_sse2_eqv8hi3 = 6892,
  CODE_FOR_sse2_eqv4si3 = 6893,
  CODE_FOR_sse4_1_eqv2di3 = 6894,
  CODE_FOR_vcondv64qiv64qi = 6895,
  CODE_FOR_vcondv32hiv64qi = 6896,
  CODE_FOR_vcondv16siv64qi = 6897,
  CODE_FOR_vcondv8div64qi = 6898,
  CODE_FOR_vcondv16sfv64qi = 6899,
  CODE_FOR_vcondv8dfv64qi = 6900,
  CODE_FOR_vcondv64qiv32hi = 6901,
  CODE_FOR_vcondv32hiv32hi = 6902,
  CODE_FOR_vcondv16siv32hi = 6903,
  CODE_FOR_vcondv8div32hi = 6904,
  CODE_FOR_vcondv16sfv32hi = 6905,
  CODE_FOR_vcondv8dfv32hi = 6906,
  CODE_FOR_vcondv64qiv16si = 6907,
  CODE_FOR_vcondv32hiv16si = 6908,
  CODE_FOR_vcondv16siv16si = 6909,
  CODE_FOR_vcondv8div16si = 6910,
  CODE_FOR_vcondv16sfv16si = 6911,
  CODE_FOR_vcondv8dfv16si = 6912,
  CODE_FOR_vcondv64qiv8di = 6913,
  CODE_FOR_vcondv32hiv8di = 6914,
  CODE_FOR_vcondv16siv8di = 6915,
  CODE_FOR_vcondv8div8di = 6916,
  CODE_FOR_vcondv16sfv8di = 6917,
  CODE_FOR_vcondv8dfv8di = 6918,
  CODE_FOR_vcondv32qiv32qi = 6919,
  CODE_FOR_vcondv32qiv16hi = 6920,
  CODE_FOR_vcondv32qiv8si = 6921,
  CODE_FOR_vcondv32qiv4di = 6922,
  CODE_FOR_vcondv16hiv32qi = 6923,
  CODE_FOR_vcondv16hiv16hi = 6924,
  CODE_FOR_vcondv16hiv8si = 6925,
  CODE_FOR_vcondv16hiv4di = 6926,
  CODE_FOR_vcondv8siv32qi = 6927,
  CODE_FOR_vcondv8siv16hi = 6928,
  CODE_FOR_vcondv8siv8si = 6929,
  CODE_FOR_vcondv8siv4di = 6930,
  CODE_FOR_vcondv4div32qi = 6931,
  CODE_FOR_vcondv4div16hi = 6932,
  CODE_FOR_vcondv4div8si = 6933,
  CODE_FOR_vcondv4div4di = 6934,
  CODE_FOR_vcondv8sfv32qi = 6935,
  CODE_FOR_vcondv8sfv16hi = 6936,
  CODE_FOR_vcondv8sfv8si = 6937,
  CODE_FOR_vcondv8sfv4di = 6938,
  CODE_FOR_vcondv4dfv32qi = 6939,
  CODE_FOR_vcondv4dfv16hi = 6940,
  CODE_FOR_vcondv4dfv8si = 6941,
  CODE_FOR_vcondv4dfv4di = 6942,
  CODE_FOR_vcondv16qiv16qi = 6943,
  CODE_FOR_vcondv8hiv16qi = 6944,
  CODE_FOR_vcondv4siv16qi = 6945,
  CODE_FOR_vcondv2div16qi = 6946,
  CODE_FOR_vcondv4sfv16qi = 6947,
  CODE_FOR_vcondv2dfv16qi = 6948,
  CODE_FOR_vcondv16qiv8hi = 6949,
  CODE_FOR_vcondv8hiv8hi = 6950,
  CODE_FOR_vcondv4siv8hi = 6951,
  CODE_FOR_vcondv2div8hi = 6952,
  CODE_FOR_vcondv4sfv8hi = 6953,
  CODE_FOR_vcondv2dfv8hi = 6954,
  CODE_FOR_vcondv16qiv4si = 6955,
  CODE_FOR_vcondv8hiv4si = 6956,
  CODE_FOR_vcondv4siv4si = 6957,
  CODE_FOR_vcondv2div4si = 6958,
  CODE_FOR_vcondv4sfv4si = 6959,
  CODE_FOR_vcondv2dfv4si = 6960,
  CODE_FOR_vcondv2div2di = 6961,
  CODE_FOR_vcondv2dfv2di = 6962,
  CODE_FOR_vconduv64qiv64qi = 6963,
  CODE_FOR_vconduv32hiv64qi = 6964,
  CODE_FOR_vconduv16siv64qi = 6965,
  CODE_FOR_vconduv8div64qi = 6966,
  CODE_FOR_vconduv16sfv64qi = 6967,
  CODE_FOR_vconduv8dfv64qi = 6968,
  CODE_FOR_vconduv64qiv32hi = 6969,
  CODE_FOR_vconduv32hiv32hi = 6970,
  CODE_FOR_vconduv16siv32hi = 6971,
  CODE_FOR_vconduv8div32hi = 6972,
  CODE_FOR_vconduv16sfv32hi = 6973,
  CODE_FOR_vconduv8dfv32hi = 6974,
  CODE_FOR_vconduv64qiv16si = 6975,
  CODE_FOR_vconduv32hiv16si = 6976,
  CODE_FOR_vconduv16siv16si = 6977,
  CODE_FOR_vconduv8div16si = 6978,
  CODE_FOR_vconduv16sfv16si = 6979,
  CODE_FOR_vconduv8dfv16si = 6980,
  CODE_FOR_vconduv64qiv8di = 6981,
  CODE_FOR_vconduv32hiv8di = 6982,
  CODE_FOR_vconduv16siv8di = 6983,
  CODE_FOR_vconduv8div8di = 6984,
  CODE_FOR_vconduv16sfv8di = 6985,
  CODE_FOR_vconduv8dfv8di = 6986,
  CODE_FOR_vconduv32qiv32qi = 6987,
  CODE_FOR_vconduv32qiv16hi = 6988,
  CODE_FOR_vconduv32qiv8si = 6989,
  CODE_FOR_vconduv32qiv4di = 6990,
  CODE_FOR_vconduv16hiv32qi = 6991,
  CODE_FOR_vconduv16hiv16hi = 6992,
  CODE_FOR_vconduv16hiv8si = 6993,
  CODE_FOR_vconduv16hiv4di = 6994,
  CODE_FOR_vconduv8siv32qi = 6995,
  CODE_FOR_vconduv8siv16hi = 6996,
  CODE_FOR_vconduv8siv8si = 6997,
  CODE_FOR_vconduv8siv4di = 6998,
  CODE_FOR_vconduv4div32qi = 6999,
  CODE_FOR_vconduv4div16hi = 7000,
  CODE_FOR_vconduv4div8si = 7001,
  CODE_FOR_vconduv4div4di = 7002,
  CODE_FOR_vconduv8sfv32qi = 7003,
  CODE_FOR_vconduv8sfv16hi = 7004,
  CODE_FOR_vconduv8sfv8si = 7005,
  CODE_FOR_vconduv8sfv4di = 7006,
  CODE_FOR_vconduv4dfv32qi = 7007,
  CODE_FOR_vconduv4dfv16hi = 7008,
  CODE_FOR_vconduv4dfv8si = 7009,
  CODE_FOR_vconduv4dfv4di = 7010,
  CODE_FOR_vconduv16qiv16qi = 7011,
  CODE_FOR_vconduv8hiv16qi = 7012,
  CODE_FOR_vconduv4siv16qi = 7013,
  CODE_FOR_vconduv2div16qi = 7014,
  CODE_FOR_vconduv4sfv16qi = 7015,
  CODE_FOR_vconduv2dfv16qi = 7016,
  CODE_FOR_vconduv16qiv8hi = 7017,
  CODE_FOR_vconduv8hiv8hi = 7018,
  CODE_FOR_vconduv4siv8hi = 7019,
  CODE_FOR_vconduv2div8hi = 7020,
  CODE_FOR_vconduv4sfv8hi = 7021,
  CODE_FOR_vconduv2dfv8hi = 7022,
  CODE_FOR_vconduv16qiv4si = 7023,
  CODE_FOR_vconduv8hiv4si = 7024,
  CODE_FOR_vconduv4siv4si = 7025,
  CODE_FOR_vconduv2div4si = 7026,
  CODE_FOR_vconduv4sfv4si = 7027,
  CODE_FOR_vconduv2dfv4si = 7028,
  CODE_FOR_vconduv2div2di = 7029,
  CODE_FOR_vconduv2dfv2di = 7030,
  CODE_FOR_vec_permv16qi = 7031,
  CODE_FOR_vec_permv8hi = 7032,
  CODE_FOR_vec_permv4si = 7033,
  CODE_FOR_vec_permv2di = 7034,
  CODE_FOR_vec_permv4sf = 7035,
  CODE_FOR_vec_permv2df = 7036,
  CODE_FOR_vec_permv32qi = 7037,
  CODE_FOR_vec_permv16hi = 7038,
  CODE_FOR_vec_permv8si = 7039,
  CODE_FOR_vec_permv4di = 7040,
  CODE_FOR_vec_permv8sf = 7041,
  CODE_FOR_vec_permv4df = 7042,
  CODE_FOR_vec_permv16sf = 7043,
  CODE_FOR_vec_permv8df = 7044,
  CODE_FOR_vec_permv16si = 7045,
  CODE_FOR_vec_permv8di = 7046,
  CODE_FOR_vec_permv32hi = 7047,
  CODE_FOR_vec_permv64qi = 7048,
  CODE_FOR_vec_perm_constv4sf = 7049,
  CODE_FOR_vec_perm_constv4si = 7050,
  CODE_FOR_vec_perm_constv2df = 7051,
  CODE_FOR_vec_perm_constv2di = 7052,
  CODE_FOR_vec_perm_constv16qi = 7053,
  CODE_FOR_vec_perm_constv8hi = 7054,
  CODE_FOR_vec_perm_constv8sf = 7055,
  CODE_FOR_vec_perm_constv4df = 7056,
  CODE_FOR_vec_perm_constv8si = 7057,
  CODE_FOR_vec_perm_constv4di = 7058,
  CODE_FOR_vec_perm_constv32qi = 7059,
  CODE_FOR_vec_perm_constv16hi = 7060,
  CODE_FOR_vec_perm_constv16si = 7061,
  CODE_FOR_vec_perm_constv8di = 7062,
  CODE_FOR_vec_perm_constv16sf = 7063,
  CODE_FOR_vec_perm_constv8df = 7064,
  CODE_FOR_vec_perm_constv32hi = 7065,
  CODE_FOR_vec_perm_constv64qi = 7066,
  CODE_FOR_one_cmplv16si2 = 7067,
  CODE_FOR_one_cmplv8di2 = 7068,
  CODE_FOR_one_cmplv64qi2 = 7069,
  CODE_FOR_one_cmplv32qi2 = 7070,
  CODE_FOR_one_cmplv16qi2 = 7071,
  CODE_FOR_one_cmplv32hi2 = 7072,
  CODE_FOR_one_cmplv16hi2 = 7073,
  CODE_FOR_one_cmplv8hi2 = 7074,
  CODE_FOR_one_cmplv8si2 = 7075,
  CODE_FOR_one_cmplv4si2 = 7076,
  CODE_FOR_one_cmplv4di2 = 7077,
  CODE_FOR_one_cmplv2di2 = 7078,
  CODE_FOR_avx512bw_andnotv64qi3 = 7079,
  CODE_FOR_avx2_andnotv32qi3 = 7080,
  CODE_FOR_sse2_andnotv16qi3 = 7081,
  CODE_FOR_avx512bw_andnotv32hi3 = 7082,
  CODE_FOR_avx2_andnotv16hi3 = 7083,
  CODE_FOR_sse2_andnotv8hi3 = 7084,
  CODE_FOR_avx512f_andnotv16si3 = 7085,
  CODE_FOR_avx2_andnotv8si3 = 7086,
  CODE_FOR_sse2_andnotv4si3 = 7087,
  CODE_FOR_avx512f_andnotv8di3 = 7088,
  CODE_FOR_avx2_andnotv4di3 = 7089,
  CODE_FOR_sse2_andnotv2di3 = 7090,
  CODE_FOR_avx512f_andnotv16si3_mask = 7091,
  CODE_FOR_avx2_andnotv8si3_mask = 7092,
  CODE_FOR_sse2_andnotv4si3_mask = 7093,
  CODE_FOR_avx512f_andnotv8di3_mask = 7094,
  CODE_FOR_avx2_andnotv4di3_mask = 7095,
  CODE_FOR_sse2_andnotv2di3_mask = 7096,
  CODE_FOR_avx512bw_andnotv64qi3_mask = 7097,
  CODE_FOR_sse2_andnotv16qi3_mask = 7098,
  CODE_FOR_avx2_andnotv32qi3_mask = 7099,
  CODE_FOR_avx512bw_andnotv32hi3_mask = 7100,
  CODE_FOR_avx2_andnotv16hi3_mask = 7101,
  CODE_FOR_sse2_andnotv8hi3_mask = 7102,
  CODE_FOR_andv16si3 = 7103,
  CODE_FOR_iorv16si3 = 7104,
  CODE_FOR_xorv16si3 = 7105,
  CODE_FOR_andv8di3 = 7106,
  CODE_FOR_iorv8di3 = 7107,
  CODE_FOR_xorv8di3 = 7108,
  CODE_FOR_andv64qi3 = 7109,
  CODE_FOR_iorv64qi3 = 7110,
  CODE_FOR_xorv64qi3 = 7111,
  CODE_FOR_andv32qi3 = 7112,
  CODE_FOR_iorv32qi3 = 7113,
  CODE_FOR_xorv32qi3 = 7114,
  CODE_FOR_andv16qi3 = 7115,
  CODE_FOR_iorv16qi3 = 7116,
  CODE_FOR_xorv16qi3 = 7117,
  CODE_FOR_andv32hi3 = 7118,
  CODE_FOR_iorv32hi3 = 7119,
  CODE_FOR_xorv32hi3 = 7120,
  CODE_FOR_andv16hi3 = 7121,
  CODE_FOR_iorv16hi3 = 7122,
  CODE_FOR_xorv16hi3 = 7123,
  CODE_FOR_andv8hi3 = 7124,
  CODE_FOR_iorv8hi3 = 7125,
  CODE_FOR_xorv8hi3 = 7126,
  CODE_FOR_andv8si3 = 7127,
  CODE_FOR_iorv8si3 = 7128,
  CODE_FOR_xorv8si3 = 7129,
  CODE_FOR_andv4si3 = 7130,
  CODE_FOR_iorv4si3 = 7131,
  CODE_FOR_xorv4si3 = 7132,
  CODE_FOR_andv4di3 = 7133,
  CODE_FOR_iorv4di3 = 7134,
  CODE_FOR_xorv4di3 = 7135,
  CODE_FOR_andv2di3 = 7136,
  CODE_FOR_iorv2di3 = 7137,
  CODE_FOR_xorv2di3 = 7138,
  CODE_FOR_vec_pack_trunc_v32hi = 7139,
  CODE_FOR_vec_pack_trunc_v16hi = 7140,
  CODE_FOR_vec_pack_trunc_v8hi = 7141,
  CODE_FOR_vec_pack_trunc_v16si = 7142,
  CODE_FOR_vec_pack_trunc_v8si = 7143,
  CODE_FOR_vec_pack_trunc_v4si = 7144,
  CODE_FOR_vec_pack_trunc_v8di = 7145,
  CODE_FOR_vec_pack_trunc_v4di = 7146,
  CODE_FOR_vec_pack_trunc_v2di = 7147,
  CODE_FOR_vec_interleave_highv32qi = 7148,
  CODE_FOR_vec_interleave_highv16hi = 7149,
  CODE_FOR_vec_interleave_highv8si = 7150,
  CODE_FOR_vec_interleave_highv4di = 7151,
  CODE_FOR_vec_interleave_lowv32qi = 7152,
  CODE_FOR_vec_interleave_lowv16hi = 7153,
  CODE_FOR_vec_interleave_lowv8si = 7154,
  CODE_FOR_vec_interleave_lowv4di = 7155,
  CODE_FOR_avx512dq_vinsertf64x2_mask = 7156,
  CODE_FOR_avx512dq_vinserti64x2_mask = 7157,
  CODE_FOR_avx512f_vinsertf32x4_mask = 7158,
  CODE_FOR_avx512f_vinserti32x4_mask = 7159,
  CODE_FOR_avx512dq_vinsertf32x8_mask = 7160,
  CODE_FOR_avx512dq_vinserti32x8_mask = 7161,
  CODE_FOR_avx512f_vinsertf64x4_mask = 7162,
  CODE_FOR_avx512f_vinserti64x4_mask = 7163,
  CODE_FOR_avx512dq_shuf_i64x2_mask = 7164,
  CODE_FOR_avx512dq_shuf_f64x2_mask = 7165,
  CODE_FOR_avx512f_shuf_f64x2_mask = 7166,
  CODE_FOR_avx512f_shuf_i64x2_mask = 7167,
  CODE_FOR_avx512vl_shuf_i32x4_mask = 7168,
  CODE_FOR_avx512vl_shuf_f32x4_mask = 7169,
  CODE_FOR_avx512f_shuf_f32x4_mask = 7170,
  CODE_FOR_avx512f_shuf_i32x4_mask = 7171,
  CODE_FOR_avx512f_pshufdv3_mask = 7172,
  CODE_FOR_avx512vl_pshufdv3_mask = 7173,
  CODE_FOR_avx2_pshufdv3 = 7174,
  CODE_FOR_avx512vl_pshufd_mask = 7175,
  CODE_FOR_sse2_pshufd = 7176,
  CODE_FOR_avx512vl_pshuflwv3_mask = 7177,
  CODE_FOR_avx2_pshuflwv3 = 7178,
  CODE_FOR_avx512vl_pshuflw_mask = 7179,
  CODE_FOR_sse2_pshuflw = 7180,
  CODE_FOR_avx2_pshufhwv3 = 7181,
  CODE_FOR_avx512vl_pshufhwv3_mask = 7182,
  CODE_FOR_avx512vl_pshufhw_mask = 7183,
  CODE_FOR_sse2_pshufhw = 7184,
  CODE_FOR_sse2_loadd = 7185,
  CODE_FOR_vec_unpacks_lo_v64qi = 7196,
  CODE_FOR_vec_unpacks_lo_v32qi = 7197,
  CODE_FOR_vec_unpacks_lo_v16qi = 7198,
  CODE_FOR_vec_unpacks_lo_v32hi = 7199,
  CODE_FOR_vec_unpacks_lo_v16hi = 7200,
  CODE_FOR_vec_unpacks_lo_v8hi = 7201,
  CODE_FOR_vec_unpacks_lo_v16si = 7202,
  CODE_FOR_vec_unpacks_lo_v8si = 7203,
  CODE_FOR_vec_unpacks_lo_v4si = 7204,
  CODE_FOR_vec_unpacks_hi_v64qi = 7205,
  CODE_FOR_vec_unpacks_hi_v32qi = 7206,
  CODE_FOR_vec_unpacks_hi_v16qi = 7207,
  CODE_FOR_vec_unpacks_hi_v32hi = 7208,
  CODE_FOR_vec_unpacks_hi_v16hi = 7209,
  CODE_FOR_vec_unpacks_hi_v8hi = 7210,
  CODE_FOR_vec_unpacks_hi_v16si = 7211,
  CODE_FOR_vec_unpacks_hi_v8si = 7212,
  CODE_FOR_vec_unpacks_hi_v4si = 7213,
  CODE_FOR_vec_unpacku_lo_v64qi = 7214,
  CODE_FOR_vec_unpacku_lo_v32qi = 7215,
  CODE_FOR_vec_unpacku_lo_v16qi = 7216,
  CODE_FOR_vec_unpacku_lo_v32hi = 7217,
  CODE_FOR_vec_unpacku_lo_v16hi = 7218,
  CODE_FOR_vec_unpacku_lo_v8hi = 7219,
  CODE_FOR_vec_unpacku_lo_v16si = 7220,
  CODE_FOR_vec_unpacku_lo_v8si = 7221,
  CODE_FOR_vec_unpacku_lo_v4si = 7222,
  CODE_FOR_vec_unpacku_hi_v64qi = 7223,
  CODE_FOR_vec_unpacku_hi_v32qi = 7224,
  CODE_FOR_vec_unpacku_hi_v16qi = 7225,
  CODE_FOR_vec_unpacku_hi_v32hi = 7226,
  CODE_FOR_vec_unpacku_hi_v16hi = 7227,
  CODE_FOR_vec_unpacku_hi_v8hi = 7228,
  CODE_FOR_vec_unpacku_hi_v16si = 7229,
  CODE_FOR_vec_unpacku_hi_v8si = 7230,
  CODE_FOR_vec_unpacku_hi_v4si = 7231,
  CODE_FOR_avx512bw_uavgv64qi3 = 7232,
  CODE_FOR_avx512bw_uavgv64qi3_mask = 7233,
  CODE_FOR_avx2_uavgv32qi3 = 7234,
  CODE_FOR_avx2_uavgv32qi3_mask = 7235,
  CODE_FOR_sse2_uavgv16qi3 = 7236,
  CODE_FOR_sse2_uavgv16qi3_mask = 7237,
  CODE_FOR_avx512bw_uavgv32hi3 = 7238,
  CODE_FOR_avx512bw_uavgv32hi3_mask = 7239,
  CODE_FOR_avx2_uavgv16hi3 = 7240,
  CODE_FOR_avx2_uavgv16hi3_mask = 7241,
  CODE_FOR_sse2_uavgv8hi3 = 7242,
  CODE_FOR_sse2_uavgv8hi3_mask = 7243,
  CODE_FOR_sse2_maskmovdqu = 7244,
  CODE_FOR_ssse3_pmulhrswv4hi3_mask = 7245,
  CODE_FOR_ssse3_pmulhrswv8hi3_mask = 7246,
  CODE_FOR_avx2_pmulhrswv16hi3_mask = 7247,
  CODE_FOR_ssse3_pmulhrswv4hi3 = 7248,
  CODE_FOR_ssse3_pmulhrswv8hi3 = 7249,
  CODE_FOR_avx2_pmulhrswv16hi3 = 7250,
  CODE_FOR_absv64qi2 = 7251,
  CODE_FOR_absv32qi2 = 7252,
  CODE_FOR_absv16qi2 = 7253,
  CODE_FOR_absv32hi2 = 7254,
  CODE_FOR_absv16hi2 = 7255,
  CODE_FOR_absv8hi2 = 7256,
  CODE_FOR_absv16si2 = 7257,
  CODE_FOR_absv8si2 = 7258,
  CODE_FOR_absv4si2 = 7259,
  CODE_FOR_absv8di2 = 7260,
  CODE_FOR_absv4di2 = 7261,
  CODE_FOR_absv2di2 = 7262,
  CODE_FOR_avx2_pblendw = 7263,
  CODE_FOR_avx_roundps_sfix256 = 7264,
  CODE_FOR_sse4_1_roundps_sfix = 7265,
  CODE_FOR_avx512f_roundpd512 = 7266,
  CODE_FOR_avx512f_roundpd_vec_pack_sfix512 = 7267,
  CODE_FOR_avx_roundpd_vec_pack_sfix256 = 7268,
  CODE_FOR_sse4_1_roundpd_vec_pack_sfix = 7269,
  CODE_FOR_roundv16sf2 = 7270,
  CODE_FOR_roundv8sf2 = 7271,
  CODE_FOR_roundv4sf2 = 7272,
  CODE_FOR_roundv8df2 = 7273,
  CODE_FOR_roundv4df2 = 7274,
  CODE_FOR_roundv2df2 = 7275,
  CODE_FOR_roundv8sf2_sfix = 7276,
  CODE_FOR_roundv4sf2_sfix = 7277,
  CODE_FOR_roundv8df2_vec_pack_sfix = 7278,
  CODE_FOR_roundv4df2_vec_pack_sfix = 7279,
  CODE_FOR_roundv2df2_vec_pack_sfix = 7280,
  CODE_FOR_avx512pf_gatherpfv16sisf = 7285,
  CODE_FOR_avx512pf_gatherpfv8disf = 7286,
  CODE_FOR_avx512pf_gatherpfv8sidf = 7287,
  CODE_FOR_avx512pf_gatherpfv8didf = 7288,
  CODE_FOR_avx512pf_scatterpfv16sisf = 7289,
  CODE_FOR_avx512pf_scatterpfv8disf = 7290,
  CODE_FOR_avx512pf_scatterpfv8sidf = 7291,
  CODE_FOR_avx512pf_scatterpfv8didf = 7292,
  CODE_FOR_rotlv16qi3 = 7293,
  CODE_FOR_rotlv8hi3 = 7294,
  CODE_FOR_rotlv4si3 = 7295,
  CODE_FOR_rotlv2di3 = 7296,
  CODE_FOR_rotrv16qi3 = 7297,
  CODE_FOR_rotrv8hi3 = 7298,
  CODE_FOR_rotrv4si3 = 7299,
  CODE_FOR_rotrv2di3 = 7300,
  CODE_FOR_vrotrv16qi3 = 7301,
  CODE_FOR_vrotrv8hi3 = 7302,
  CODE_FOR_vrotrv4si3 = 7303,
  CODE_FOR_vrotrv2di3 = 7304,
  CODE_FOR_vrotlv16qi3 = 7305,
  CODE_FOR_vrotlv8hi3 = 7306,
  CODE_FOR_vrotlv4si3 = 7307,
  CODE_FOR_vrotlv2di3 = 7308,
  CODE_FOR_vlshrv16qi3 = 7309,
  CODE_FOR_vlshrv8hi3 = 7310,
  CODE_FOR_vlshrv4si3 = 7311,
  CODE_FOR_vlshrv2di3 = 7312,
  CODE_FOR_vlshrv16si3 = 7313,
  CODE_FOR_vlshrv8di3 = 7314,
  CODE_FOR_vlshrv8si3 = 7315,
  CODE_FOR_vlshrv4di3 = 7316,
  CODE_FOR_vashrv8hi3 = 7317,
  CODE_FOR_vashrv8hi3_mask = 7318,
  CODE_FOR_vashrv16qi3 = 7319,
  CODE_FOR_vashrv2di3 = 7320,
  CODE_FOR_vashrv2di3_mask = 7321,
  CODE_FOR_vashrv4si3 = 7322,
  CODE_FOR_vashrv16si3 = 7323,
  CODE_FOR_vashrv8si3 = 7324,
  CODE_FOR_vashlv16qi3 = 7325,
  CODE_FOR_vashlv8hi3 = 7326,
  CODE_FOR_vashlv4si3 = 7327,
  CODE_FOR_vashlv2di3 = 7328,
  CODE_FOR_vashlv16si3 = 7329,
  CODE_FOR_vashlv8di3 = 7330,
  CODE_FOR_vashlv8si3 = 7331,
  CODE_FOR_vashlv4di3 = 7332,
  CODE_FOR_ashlv64qi3 = 7333,
  CODE_FOR_lshrv64qi3 = 7334,
  CODE_FOR_ashrv64qi3 = 7335,
  CODE_FOR_ashlv32qi3 = 7336,
  CODE_FOR_lshrv32qi3 = 7337,
  CODE_FOR_ashrv32qi3 = 7338,
  CODE_FOR_ashlv16qi3 = 7339,
  CODE_FOR_lshrv16qi3 = 7340,
  CODE_FOR_ashrv16qi3 = 7341,
  CODE_FOR_ashrv2di3 = 7342,
  CODE_FOR_xop_vmfrczv4sf2 = 7343,
  CODE_FOR_xop_vmfrczv2df2 = 7344,
  CODE_FOR_avx_vzeroall = 7345,
  CODE_FOR_avx2_permv4di = 7346,
  CODE_FOR_avx2_permv4df = 7347,
  CODE_FOR_avx512f_permv8di = 7348,
  CODE_FOR_avx512f_permv8df = 7349,
  CODE_FOR_avx512vl_permv4di_mask = 7350,
  CODE_FOR_avx512vl_permv4df_mask = 7351,
  CODE_FOR_avx512f_permv8di_mask = 7352,
  CODE_FOR_avx512f_permv8df_mask = 7353,
  CODE_FOR_avx512f_vpermilv8df = 7366,
  CODE_FOR_avx512f_vpermilv8df_mask = 7367,
  CODE_FOR_avx_vpermilv4df = 7368,
  CODE_FOR_avx_vpermilv4df_mask = 7369,
  CODE_FOR_avx_vpermilv2df = 7370,
  CODE_FOR_avx_vpermilv2df_mask = 7371,
  CODE_FOR_avx512f_vpermilv16sf = 7372,
  CODE_FOR_avx512f_vpermilv16sf_mask = 7373,
  CODE_FOR_avx_vpermilv8sf = 7374,
  CODE_FOR_avx_vpermilv8sf_mask = 7375,
  CODE_FOR_avx_vpermilv4sf = 7376,
  CODE_FOR_avx_vpermilv4sf_mask = 7377,
  CODE_FOR_avx512f_vpermi2varv16si3_maskz = 7378,
  CODE_FOR_avx512f_vpermi2varv16sf3_maskz = 7379,
  CODE_FOR_avx512f_vpermi2varv8di3_maskz = 7380,
  CODE_FOR_avx512f_vpermi2varv8df3_maskz = 7381,
  CODE_FOR_avx512vl_vpermi2varv8si3_maskz = 7382,
  CODE_FOR_avx512vl_vpermi2varv8sf3_maskz = 7383,
  CODE_FOR_avx512vl_vpermi2varv4di3_maskz = 7384,
  CODE_FOR_avx512vl_vpermi2varv4df3_maskz = 7385,
  CODE_FOR_avx512vl_vpermi2varv4si3_maskz = 7386,
  CODE_FOR_avx512vl_vpermi2varv4sf3_maskz = 7387,
  CODE_FOR_avx512vl_vpermi2varv2di3_maskz = 7388,
  CODE_FOR_avx512vl_vpermi2varv2df3_maskz = 7389,
  CODE_FOR_avx512bw_vpermi2varv64qi3_maskz = 7390,
  CODE_FOR_avx512vl_vpermi2varv16qi3_maskz = 7391,
  CODE_FOR_avx512vl_vpermi2varv32qi3_maskz = 7392,
  CODE_FOR_avx512vl_vpermi2varv8hi3_maskz = 7393,
  CODE_FOR_avx512vl_vpermi2varv16hi3_maskz = 7394,
  CODE_FOR_avx512bw_vpermi2varv32hi3_maskz = 7395,
  CODE_FOR_avx512f_vpermt2varv16si3_maskz = 7396,
  CODE_FOR_avx512f_vpermt2varv16sf3_maskz = 7397,
  CODE_FOR_avx512f_vpermt2varv8di3_maskz = 7398,
  CODE_FOR_avx512f_vpermt2varv8df3_maskz = 7399,
  CODE_FOR_avx512vl_vpermt2varv8si3_maskz = 7400,
  CODE_FOR_avx512vl_vpermt2varv8sf3_maskz = 7401,
  CODE_FOR_avx512vl_vpermt2varv4di3_maskz = 7402,
  CODE_FOR_avx512vl_vpermt2varv4df3_maskz = 7403,
  CODE_FOR_avx512vl_vpermt2varv4si3_maskz = 7404,
  CODE_FOR_avx512vl_vpermt2varv4sf3_maskz = 7405,
  CODE_FOR_avx512vl_vpermt2varv2di3_maskz = 7406,
  CODE_FOR_avx512vl_vpermt2varv2df3_maskz = 7407,
  CODE_FOR_avx512bw_vpermt2varv64qi3_maskz = 7408,
  CODE_FOR_avx512vl_vpermt2varv16qi3_maskz = 7409,
  CODE_FOR_avx512vl_vpermt2varv32qi3_maskz = 7410,
  CODE_FOR_avx512vl_vpermt2varv8hi3_maskz = 7411,
  CODE_FOR_avx512vl_vpermt2varv16hi3_maskz = 7412,
  CODE_FOR_avx512bw_vpermt2varv32hi3_maskz = 7413,
  CODE_FOR_avx_vperm2f128v8si3 = 7414,
  CODE_FOR_avx_vperm2f128v8sf3 = 7415,
  CODE_FOR_avx_vperm2f128v4df3 = 7416,
  CODE_FOR_avx512vl_vinsertv8si = 7417,
  CODE_FOR_avx512vl_vinsertv8sf = 7418,
  CODE_FOR_avx512vl_vinsertv4di = 7419,
  CODE_FOR_avx512vl_vinsertv4df = 7420,
  CODE_FOR_avx_vinsertf128v32qi = 7421,
  CODE_FOR_avx_vinsertf128v16hi = 7422,
  CODE_FOR_avx_vinsertf128v8si = 7423,
  CODE_FOR_avx_vinsertf128v4di = 7424,
  CODE_FOR_avx_vinsertf128v8sf = 7425,
  CODE_FOR_avx_vinsertf128v4df = 7426,
  CODE_FOR_maskloadv4sf = 7427,
  CODE_FOR_maskloadv2df = 7428,
  CODE_FOR_maskloadv8sf = 7429,
  CODE_FOR_maskloadv4df = 7430,
  CODE_FOR_maskloadv4si = 7431,
  CODE_FOR_maskloadv2di = 7432,
  CODE_FOR_maskloadv8si = 7433,
  CODE_FOR_maskloadv4di = 7434,
  CODE_FOR_maskstorev4sf = 7435,
  CODE_FOR_maskstorev2df = 7436,
  CODE_FOR_maskstorev8sf = 7437,
  CODE_FOR_maskstorev4df = 7438,
  CODE_FOR_maskstorev4si = 7439,
  CODE_FOR_maskstorev2di = 7440,
  CODE_FOR_maskstorev8si = 7441,
  CODE_FOR_maskstorev4di = 7442,
  CODE_FOR_vec_initv32qi = 7446,
  CODE_FOR_vec_initv16hi = 7447,
  CODE_FOR_vec_initv8si = 7448,
  CODE_FOR_vec_initv4di = 7449,
  CODE_FOR_vec_initv8sf = 7450,
  CODE_FOR_vec_initv4df = 7451,
  CODE_FOR_vec_initv16si = 7452,
  CODE_FOR_vec_initv16sf = 7453,
  CODE_FOR_vec_initv8di = 7454,
  CODE_FOR_vec_initv8df = 7455,
  CODE_FOR_vec_initv32hi = 7456,
  CODE_FOR_vec_initv64qi = 7457,
  CODE_FOR_vcvtps2ph_mask = 7458,
  CODE_FOR_vcvtps2ph = 7459,
  CODE_FOR_avx2_gathersiv2di = 7460,
  CODE_FOR_avx2_gathersiv2df = 7461,
  CODE_FOR_avx2_gathersiv4di = 7462,
  CODE_FOR_avx2_gathersiv4df = 7463,
  CODE_FOR_avx2_gathersiv4si = 7464,
  CODE_FOR_avx2_gathersiv4sf = 7465,
  CODE_FOR_avx2_gathersiv8si = 7466,
  CODE_FOR_avx2_gathersiv8sf = 7467,
  CODE_FOR_avx2_gatherdiv2di = 7468,
  CODE_FOR_avx2_gatherdiv2df = 7469,
  CODE_FOR_avx2_gatherdiv4di = 7470,
  CODE_FOR_avx2_gatherdiv4df = 7471,
  CODE_FOR_avx2_gatherdiv4si = 7472,
  CODE_FOR_avx2_gatherdiv4sf = 7473,
  CODE_FOR_avx2_gatherdiv8si = 7474,
  CODE_FOR_avx2_gatherdiv8sf = 7475,
  CODE_FOR_avx512f_gathersiv16si = 7476,
  CODE_FOR_avx512f_gathersiv16sf = 7477,
  CODE_FOR_avx512f_gathersiv8di = 7478,
  CODE_FOR_avx512f_gathersiv8df = 7479,
  CODE_FOR_avx512vl_gathersiv8si = 7480,
  CODE_FOR_avx512vl_gathersiv8sf = 7481,
  CODE_FOR_avx512vl_gathersiv4di = 7482,
  CODE_FOR_avx512vl_gathersiv4df = 7483,
  CODE_FOR_avx512vl_gathersiv4si = 7484,
  CODE_FOR_avx512vl_gathersiv4sf = 7485,
  CODE_FOR_avx512vl_gathersiv2di = 7486,
  CODE_FOR_avx512vl_gathersiv2df = 7487,
  CODE_FOR_avx512f_gatherdiv16si = 7488,
  CODE_FOR_avx512f_gatherdiv16sf = 7489,
  CODE_FOR_avx512f_gatherdiv8di = 7490,
  CODE_FOR_avx512f_gatherdiv8df = 7491,
  CODE_FOR_avx512vl_gatherdiv8si = 7492,
  CODE_FOR_avx512vl_gatherdiv8sf = 7493,
  CODE_FOR_avx512vl_gatherdiv4di = 7494,
  CODE_FOR_avx512vl_gatherdiv4df = 7495,
  CODE_FOR_avx512vl_gatherdiv4si = 7496,
  CODE_FOR_avx512vl_gatherdiv4sf = 7497,
  CODE_FOR_avx512vl_gatherdiv2di = 7498,
  CODE_FOR_avx512vl_gatherdiv2df = 7499,
  CODE_FOR_avx512f_scattersiv16si = 7500,
  CODE_FOR_avx512f_scattersiv16sf = 7501,
  CODE_FOR_avx512f_scattersiv8di = 7502,
  CODE_FOR_avx512f_scattersiv8df = 7503,
  CODE_FOR_avx512vl_scattersiv8si = 7504,
  CODE_FOR_avx512vl_scattersiv8sf = 7505,
  CODE_FOR_avx512vl_scattersiv4di = 7506,
  CODE_FOR_avx512vl_scattersiv4df = 7507,
  CODE_FOR_avx512vl_scattersiv4si = 7508,
  CODE_FOR_avx512vl_scattersiv4sf = 7509,
  CODE_FOR_avx512vl_scattersiv2di = 7510,
  CODE_FOR_avx512vl_scattersiv2df = 7511,
  CODE_FOR_avx512f_scatterdiv16si = 7512,
  CODE_FOR_avx512f_scatterdiv16sf = 7513,
  CODE_FOR_avx512f_scatterdiv8di = 7514,
  CODE_FOR_avx512f_scatterdiv8df = 7515,
  CODE_FOR_avx512vl_scatterdiv8si = 7516,
  CODE_FOR_avx512vl_scatterdiv8sf = 7517,
  CODE_FOR_avx512vl_scatterdiv4di = 7518,
  CODE_FOR_avx512vl_scatterdiv4df = 7519,
  CODE_FOR_avx512vl_scatterdiv4si = 7520,
  CODE_FOR_avx512vl_scatterdiv4sf = 7521,
  CODE_FOR_avx512vl_scatterdiv2di = 7522,
  CODE_FOR_avx512vl_scatterdiv2df = 7523,
  CODE_FOR_avx512f_expandv16si_maskz = 7524,
  CODE_FOR_avx512f_expandv16sf_maskz = 7525,
  CODE_FOR_avx512f_expandv8di_maskz = 7526,
  CODE_FOR_avx512f_expandv8df_maskz = 7527,
  CODE_FOR_avx512vl_expandv8si_maskz = 7528,
  CODE_FOR_avx512vl_expandv8sf_maskz = 7529,
  CODE_FOR_avx512vl_expandv4di_maskz = 7530,
  CODE_FOR_avx512vl_expandv4df_maskz = 7531,
  CODE_FOR_avx512vl_expandv4si_maskz = 7532,
  CODE_FOR_avx512vl_expandv4sf_maskz = 7533,
  CODE_FOR_avx512vl_expandv2di_maskz = 7534,
  CODE_FOR_avx512vl_expandv2df_maskz = 7535,
  CODE_FOR_vpamdd52huqv8di_maskz = 7542,
  CODE_FOR_vpamdd52huqv4di_maskz = 7543,
  CODE_FOR_vpamdd52huqv2di_maskz = 7544,
  CODE_FOR_vpamdd52luqv8di_maskz = 7545,
  CODE_FOR_vpamdd52luqv4di_maskz = 7546,
  CODE_FOR_vpamdd52luqv2di_maskz = 7547,
  CODE_FOR_sse2_lfence = 7548,
  CODE_FOR_sse_sfence = 7549,
  CODE_FOR_sse2_mfence = 7550,
  CODE_FOR_mem_thread_fence = 7551,
  CODE_FOR_atomic_loadqi = 7552,
  CODE_FOR_atomic_loadhi = 7553,
  CODE_FOR_atomic_loadsi = 7554,
  CODE_FOR_atomic_loaddi = 7555,
  CODE_FOR_atomic_storeqi = 7557,
  CODE_FOR_atomic_storehi = 7558,
  CODE_FOR_atomic_storesi = 7559,
  CODE_FOR_atomic_storedi = 7560,
  CODE_FOR_atomic_compare_and_swapqi = 7562,
  CODE_FOR_atomic_compare_and_swaphi = 7563,
  CODE_FOR_atomic_compare_and_swapsi = 7564,
  CODE_FOR_atomic_compare_and_swapdi = 7565,
  CODE_FOR_atomic_compare_and_swapti = 7566,
  LAST_INSN_CODE = 7567
};

#endif /* GCC_INSN_CODES_H */
